{"id":2228885,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228885/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-64-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260427124738.966578-64-peter.maydell@linaro.org>","date":"2026-04-27T12:47:37","name":"[PULL,63/63] target/arm: report register in WFIT syndromes","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"710274731b6fd18f298437029808fc655eec0171","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/1.1/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-64-peter.maydell@linaro.org/mbox/","series":[{"id":501642,"url":"http://patchwork.ozlabs.org/api/1.1/series/501642/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501642","date":"2026-04-27T12:46:34","name":"[PULL,01/63] docs/system: add FEAT_AA32 and FEAT_AA64 to emulation list","version":1,"mbox":"http://patchwork.ozlabs.org/series/501642/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228885/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228885/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=qRf2jCiE;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g43b24VL0z1yHX\n\tfor ; Mon, 27 Apr 2026 23:00:46 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wHLUW-0007wv-E0; Mon, 27 Apr 2026 08:55:12 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wHLOC-0008KB-BI\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:48:41 -0400","from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wHLOA-0005p1-Fn\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:48:39 -0400","by mail-wm1-x32d.google.com with SMTP id\n 5b1f17b1804b1-4893940bb5eso53245405e9.3\n for ; Mon, 27 Apr 2026 05:48:38 -0700 (PDT)","from lanath.. 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32d;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Alex Bennée \n\nPass the register number (rd) to the wfit helper and report it in the\nsyndrome ISS.\n\nReviewed-by: Richard Henderson \nSigned-off-by: Alex Bennée \nMessage-id: 20260422125250.1303100-24-alex.bennee@linaro.org\nSigned-off-by: Peter Maydell \n---\n target/arm/syndrome.h | 11 ++++++++++-\n target/arm/tcg/helper-defs.h | 2 +-\n target/arm/tcg/op_helper.c | 7 ++++---\n target/arm/tcg/translate-a64.c | 2 +-\n 4 files changed, 16 insertions(+), 6 deletions(-)","diff":"diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h\nindex 04a71eebcb..4d1f1c529e 100644\n--- a/target/arm/syndrome.h\n+++ b/target/arm/syndrome.h\n@@ -670,7 +670,14 @@ FIELD(WFX_ISS, RN, 5, 5)\n FIELD(WFX_ISS, COND, 20, 4)\n FIELD(WFX_ISS, CV, 24, 1)\n \n-static inline uint32_t syn_wfx(int cv, int cond, int ti, bool is_16bit)\n+typedef enum {\n+ WFI = 0b00,\n+ WFE = 0b01,\n+ WFIT = 0b10,\n+ WFET = 0xb11\n+} wfx_ti;\n+\n+static inline uint32_t syn_wfx(int cv, int cond, int rn, bool rv, wfx_ti ti, bool is_16bit)\n {\n uint32_t res = syn_set_ec(0, EC_WFX_TRAP);\n res = FIELD_DP32(res, SYNDROME, IL, !is_16bit);\n@@ -678,6 +685,8 @@ static inline uint32_t syn_wfx(int cv, int cond, int ti, bool is_16bit)\n res = FIELD_DP32(res, WFX_ISS, CV, cv);\n res = FIELD_DP32(res, WFX_ISS, COND, cond);\n res = FIELD_DP32(res, WFX_ISS, TI, ti);\n+ res = FIELD_DP32(res, WFX_ISS, RN, rn);\n+ res = FIELD_DP32(res, WFX_ISS, RV, rv);\n \n return res;\n }\ndiff --git a/target/arm/tcg/helper-defs.h b/target/arm/tcg/helper-defs.h\nindex 5a10a9fba3..a05f2258f2 100644\n--- a/target/arm/tcg/helper-defs.h\n+++ b/target/arm/tcg/helper-defs.h\n@@ -55,7 +55,7 @@ DEF_HELPER_2(exception_pc_alignment, noreturn, env, vaddr)\n DEF_HELPER_1(setend, void, env)\n DEF_HELPER_2(wfi, void, env, i32)\n DEF_HELPER_1(wfe, void, env)\n-DEF_HELPER_2(wfit, void, env, i64)\n+DEF_HELPER_2(wfit, void, env, i32)\n DEF_HELPER_1(yield, void, env)\n DEF_HELPER_1(pre_hvc, void, env)\n DEF_HELPER_2(pre_smc, void, env, i32)\ndiff --git a/target/arm/tcg/op_helper.c b/target/arm/tcg/op_helper.c\nindex 75ad53ec6c..e8f0996ed3 100644\n--- a/target/arm/tcg/op_helper.c\n+++ b/target/arm/tcg/op_helper.c\n@@ -398,7 +398,7 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len)\n env->regs[15] -= insn_len;\n }\n \n- raise_exception(env, excp, syn_wfx(1, 0xe, 0, insn_len == 2),\n+ raise_exception(env, excp, syn_wfx(1, 0xe, 0, false, WFI, insn_len == 2),\n target_el);\n }\n \n@@ -408,7 +408,7 @@ void HELPER(wfi)(CPUARMState *env, uint32_t insn_len)\n #endif\n }\n \n-void HELPER(wfit)(CPUARMState *env, uint64_t timeout)\n+void HELPER(wfit)(CPUARMState *env, uint32_t rd)\n {\n #ifdef CONFIG_USER_ONLY\n /*\n@@ -427,6 +427,7 @@ void HELPER(wfit)(CPUARMState *env, uint64_t timeout)\n int target_el = check_wfx_trap(env, false, &excp);\n /* The WFIT should time out when CNTVCT_EL0 >= the specified value. */\n uint64_t cntval = gt_get_countervalue(env);\n+ uint64_t timeout = env->xregs[rd];\n /*\n * We want the value that we would get if we read CNTVCT_EL0 from\n * the current exception level, so the direct_access offset, not\n@@ -447,7 +448,7 @@ void HELPER(wfit)(CPUARMState *env, uint64_t timeout)\n \n if (target_el) {\n env->pc -= 4;\n- raise_exception(env, excp, syn_wfx(1, 0xe, 2, false), target_el);\n+ raise_exception(env, excp, syn_wfx(1, 0xe, rd, true, WFIT, false), target_el);\n }\n \n if (uadd64_overflow(timeout, offset, &nexttick)) {\ndiff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c\nindex 48b5c57255..9a27c4c6ec 100644\n--- a/target/arm/tcg/translate-a64.c\n+++ b/target/arm/tcg/translate-a64.c\n@@ -2065,7 +2065,7 @@ static bool trans_WFIT(DisasContext *s, arg_WFIT *a)\n }\n \n gen_a64_update_pc(s, 4);\n- gen_helper_wfit(tcg_env, cpu_reg(s, a->rd));\n+ gen_helper_wfit(tcg_env, tcg_constant_i32(a->rd));\n /* Go back to the main loop to check for interrupts */\n s->base.is_jmp = DISAS_EXIT;\n return true;\n","prefixes":["PULL","63/63"]}