{"id":2228815,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228815/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-7-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260427124738.966578-7-peter.maydell@linaro.org>","date":"2026-04-27T12:46:40","name":"[PULL,06/63] hw/arm/fsl-imx8mm: Implemented support for SNVS","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"f86f26c75dfc1b1e5a04da5222ec49e3fea04129","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/1.1/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427124738.966578-7-peter.maydell@linaro.org/mbox/","series":[{"id":501642,"url":"http://patchwork.ozlabs.org/api/1.1/series/501642/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501642","date":"2026-04-27T12:46:34","name":"[PULL,01/63] docs/system: add FEAT_AA32 and FEAT_AA64 to emulation list","version":1,"mbox":"http://patchwork.ozlabs.org/series/501642/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228815/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228815/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=lcFLd+Uj;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g43KV1F54z1yHX\n\tfor ; Mon, 27 Apr 2026 22:49:02 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wHLOG-0008ND-TJ; Mon, 27 Apr 2026 08:48:44 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wHLNO-0007m1-BJ\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:47:51 -0400","from mail-wm1-x329.google.com ([2a00:1450:4864:20::329])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wHLNL-0005TP-04\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 08:47:50 -0400","by mail-wm1-x329.google.com with SMTP id\n 5b1f17b1804b1-4891e5b9c1fso86366585e9.2\n for ; Mon, 27 Apr 2026 05:47:45 -0700 (PDT)","from lanath.. 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helo=mail-wm1-x329.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Gaurav Sharma \n\nSNVS contains an RTC which allows Linux to deal correctly with time\n\nReviewed-by: Peter Maydell \nReviewed-by: Bernhard Beschow \nSigned-off-by: Gaurav Sharma \nSigned-off-by: Peter Maydell \n---\n hw/arm/fsl-imx8mm.c | 10 ++++++++++\n include/hw/arm/fsl-imx8mm.h | 2 ++\n 2 files changed, 12 insertions(+)","diff":"diff --git a/hw/arm/fsl-imx8mm.c b/hw/arm/fsl-imx8mm.c\nindex 053434412c..8999bc701e 100644\n--- a/hw/arm/fsl-imx8mm.c\n+++ b/hw/arm/fsl-imx8mm.c\n@@ -173,6 +173,8 @@ static void fsl_imx8mm_init(Object *obj)\n \n object_initialize_child(obj, \"analog\", &s->analog, TYPE_IMX8MP_ANALOG);\n \n+ object_initialize_child(obj, \"snvs\", &s->snvs, TYPE_IMX7_SNVS);\n+\n for (i = 0; i < FSL_IMX8MM_NUM_UARTS; i++) {\n g_autofree char *name = g_strdup_printf(\"uart%d\", i + 1);\n object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);\n@@ -355,6 +357,13 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n fsl_imx8mm_memmap[FSL_IMX8MM_OCRAM].addr,\n &s->ocram);\n \n+ /* SNVS */\n+ if (!sysbus_realize(SYS_BUS_DEVICE(&s->snvs), errp)) {\n+ return;\n+ }\n+ sysbus_mmio_map(SYS_BUS_DEVICE(&s->snvs), 0,\n+ fsl_imx8mm_memmap[FSL_IMX8MM_SNVS_HP].addr);\n+\n /* Unimplemented devices */\n for (i = 0; i < ARRAY_SIZE(fsl_imx8mm_memmap); i++) {\n switch (i) {\n@@ -364,6 +373,7 @@ static void fsl_imx8mm_realize(DeviceState *dev, Error **errp)\n case FSL_IMX8MM_GIC_REDIST:\n case FSL_IMX8MM_RAM:\n case FSL_IMX8MM_OCRAM:\n+ case FSL_IMX8MM_SNVS_HP:\n case FSL_IMX8MM_UART1 ... FSL_IMX8MM_UART4:\n /* device implemented and treated above */\n break;\ndiff --git a/include/hw/arm/fsl-imx8mm.h b/include/hw/arm/fsl-imx8mm.h\nindex df35f0f5ac..8a172b89e0 100644\n--- a/include/hw/arm/fsl-imx8mm.h\n+++ b/include/hw/arm/fsl-imx8mm.h\n@@ -13,6 +13,7 @@\n #include \"cpu.h\"\n #include \"hw/char/imx_serial.h\"\n #include \"hw/intc/arm_gicv3_common.h\"\n+#include \"hw/misc/imx7_snvs.h\"\n #include \"hw/misc/imx8mp_analog.h\"\n #include \"hw/misc/imx8mp_ccm.h\"\n #include \"qom/object.h\"\n@@ -37,6 +38,7 @@ struct FslImx8mmState {\n GICv3State gic;\n IMX8MPCCMState ccm;\n IMX8MPAnalogState analog;\n+ IMX7SNVSState snvs;\n IMXSerialState uart[FSL_IMX8MM_NUM_UARTS];\n MemoryRegion ocram;\n };\n","prefixes":["PULL","06/63"]}