{"id":2228619,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228619/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260427070312.81679-8-clamor95@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/1.1/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260427070312.81679-8-clamor95@gmail.com>","date":"2026-04-27T07:03:12","name":"[v2,7/7] ARM: tegra: Configure Tegra114 power domains","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"af3e85cf5b37eaf04090f9bedf9eaa1c884dc781","submitter":{"id":84146,"url":"http://patchwork.ozlabs.org/api/1.1/people/84146/?format=json","name":"Svyatoslav Ryhel","email":"clamor95@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260427070312.81679-8-clamor95@gmail.com/mbox/","series":[{"id":501587,"url":"http://patchwork.ozlabs.org/api/1.1/series/501587/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=501587","date":"2026-04-27T07:03:06","name":"Tegra114: implement EMC support","version":2,"mbox":"http://patchwork.ozlabs.org/series/501587/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228619/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228619/checks/","tags":{},"headers":{"Return-Path":"\n <linux-tegra+bounces-13987-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com 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ffacd0b85a97d-44137b5fc4amr13855964f8f.14.1777273425028;\n        Mon, 27 Apr 2026 00:03:45 -0700 (PDT)","From":"Svyatoslav Ryhel <clamor95@gmail.com>","To":"Krzysztof Kozlowski <krzk@kernel.org>,\n\tRob Herring <robh@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tThierry Reding <thierry.reding@kernel.org>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\tMikko Perttunen <mperttunen@nvidia.com>,\n\tSvyatoslav Ryhel <clamor95@gmail.com>","Cc":"linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org","Subject":"[PATCH v2 7/7] ARM: tegra: Configure Tegra114 power domains","Date":"Mon, 27 Apr 2026 10:03:12 +0300","Message-ID":"<20260427070312.81679-8-clamor95@gmail.com>","X-Mailer":"git-send-email 2.51.0","In-Reply-To":"<20260427070312.81679-1-clamor95@gmail.com>","References":"<20260427070312.81679-1-clamor95@gmail.com>","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"<linux-tegra.vger.kernel.org>","List-Subscribe":"<mailto:linux-tegra+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-tegra+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Add power domains found in Tegra114 and configure operating-points-v2 for\nsupported devices accordingly.\n\nSigned-off-by: Svyatoslav Ryhel <clamor95@gmail.com>\nReviewed-by: Mikko Perttunen <mperttunen@nvidia.com>\n---\n .../dts/nvidia/tegra114-peripherals-opp.dtsi  | 1275 +++++++++++++++++\n arch/arm/boot/dts/nvidia/tegra114.dtsi        |  126 ++\n 2 files changed, 1401 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi b/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi\nindex b40a1c24abab..bab6122dba48 100644\n--- a/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi\n+++ b/arch/arm/boot/dts/nvidia/tegra114-peripherals-opp.dtsi\n@@ -1,6 +1,76 @@\n // SPDX-License-Identifier: GPL-2.0\n \n / {\n+\tcore_opp_table: opp-table-core {\n+\t\tcompatible = \"operating-points-v2\";\n+\t\topp-shared;\n+\n+\t\tcore_opp_900: opp-900000 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-level = <900000>;\n+\t\t};\n+\n+\t\tcore_opp_950: opp-950000 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-level = <950000>;\n+\t\t};\n+\n+\t\tcore_opp_1000: opp-1000000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-level = <1000000>;\n+\t\t};\n+\n+\t\tcore_opp_1050: opp-1050000 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-level = <1050000>;\n+\t\t};\n+\n+\t\tcore_opp_1100: opp-1100000 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-level = <1100000>;\n+\t\t};\n+\n+\t\tcore_opp_1120: opp-1120000 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-level = <1120000>;\n+\t\t};\n+\n+\t\tcore_opp_1150: opp-1150000 {\n+\t\t\topp-microvolt = <1150000 1150000 1390000>;\n+\t\t\topp-level = <1150000>;\n+\t\t};\n+\n+\t\tcore_opp_1170: opp-1170000 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-level = <1170000>;\n+\t\t};\n+\n+\t\tcore_opp_1200: opp-1200000 {\n+\t\t\topp-microvolt = <1200000 1200000 1390000>;\n+\t\t\topp-level = <1200000>;\n+\t\t};\n+\n+\t\tcore_opp_1250: opp-1250000 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-level = <1250000>;\n+\t\t};\n+\n+\t\tcore_opp_1300: opp-1300000 {\n+\t\t\topp-microvolt = <1300000 1300000 1390000>;\n+\t\t\topp-level = <1300000>;\n+\t\t};\n+\n+\t\tcore_opp_1350: opp-1350000 {\n+\t\t\topp-microvolt = <1350000 1350000 1390000>;\n+\t\t\topp-level = <1350000>;\n+\t\t};\n+\n+\t\tcore_opp_1390: opp-1390000 {\n+\t\t\topp-microvolt = <1390000 1390000 1390000>;\n+\t\t\topp-level = <1390000>;\n+\t\t};\n+\t};\n+\n \temc_icc_dvfs_opp_table: opp-table-emc {\n \t\tcompatible = \"operating-points-v2\";\n \n@@ -8,36 +78,42 @@ opp-12750000-900 {\n \t\t\topp-microvolt = <900000 900000 1390000>;\n \t\t\topp-hz = /bits/ 64 <12750000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n \t\t};\n \n \t\topp-20400000-900 {\n \t\t\topp-microvolt = <900000 900000 1390000>;\n \t\t\topp-hz = /bits/ 64 <20400000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n \t\t};\n \n \t\topp-40800000-900 {\n \t\t\topp-microvolt = <900000 900000 1390000>;\n \t\t\topp-hz = /bits/ 64 <40800000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n \t\t};\n \n \t\topp-68000000-900 {\n \t\t\topp-microvolt = <900000 900000 1390000>;\n \t\t\topp-hz = /bits/ 64 <68000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n \t\t};\n \n \t\topp-102000000-900 {\n \t\t\topp-microvolt = <900000 900000 1390000>;\n \t\t\topp-hz = /bits/ 64 <102000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n \t\t};\n \n \t\topp-204000000-900 {\n \t\t\topp-microvolt = <900000 900000 1390000>;\n \t\t\topp-hz = /bits/ 64 <204000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n \t\t\topp-suspend;\n \t\t};\n \n@@ -45,12 +121,14 @@ opp-312000000-1000 {\n \t\t\topp-microvolt = <1000000 1000000 1390000>;\n \t\t\topp-hz = /bits/ 64 <312000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n \t\t};\n \n \t\topp-408000000-1000 {\n \t\t\topp-microvolt = <1000000 1000000 1390000>;\n \t\t\topp-hz = /bits/ 64 <408000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n \t\t};\n \n \t\t/*\n@@ -64,24 +142,28 @@ opp-528000000-1100 {\n \t\t\topp-microvolt = <1100000 1100000 1390000>;\n \t\t\topp-hz = /bits/ 64 <528000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n \t\t};\n \n \t\topp-624000000-1100 {\n \t\t\topp-microvolt = <1100000 1100000 1390000>;\n \t\t\topp-hz = /bits/ 64 <624000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n \t\t};\n \n \t\topp-792000000-1100 {\n \t\t\topp-microvolt = <1100000 1100000 1390000>;\n \t\t\topp-hz = /bits/ 64 <792000000>;\n \t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n \t\t};\n \n \t\topp-900000000-1200 {\n \t\t\topp-microvolt = <1200000 1200000 1390000>;\n \t\t\topp-hz = /bits/ 64 <900000000>;\n \t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1200>;\n \t\t};\n \t};\n \n@@ -161,4 +243,1197 @@ opp-900000000 {\n \t\t\topp-peak-kBps = <14400000>;\n \t\t};\n \t};\n+\n+\tvi_dvfs_opp_table: opp-table-vi {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-114000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <114000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-216000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <216000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-240000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-312000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <312000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-372000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <372000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-408000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <408000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-408000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <408000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\t};\n+\n+\tepp_dvfs_opp_table: opp-table-epp {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-192000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <192000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-240000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-228000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <228000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-300000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <300000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-300000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <300000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-384000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <384000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-396000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <396000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-468000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <468000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-492000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <492000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-528000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <528000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-516000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <516000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-564000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <564000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-552000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <552000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\n+\t\topp-600000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <600000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\n+\t\topp-600000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <600000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\n+\t\topp-636000000-1200 {\n+\t\t\topp-microvolt = <1200000 1200000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <636000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1200>;\n+\t\t};\n+\n+\t\topp-672000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <672000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\n+\t\topp-828000000-1390 {\n+\t\t\topp-microvolt = <1390000 1390000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <828000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1390>;\n+\t\t};\n+\t};\n+\n+\tgr2d_dvfs_opp_table: opp-table-gr2d {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-192000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <192000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-240000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-228000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <228000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-300000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <300000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-300000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <300000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-384000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <384000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-396000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <396000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-468000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <468000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-492000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <492000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-528000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <528000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-516000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <516000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-564000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <564000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-552000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <552000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\n+\t\topp-600000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <600000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\n+\t\topp-600000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <600000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\n+\t\topp-636000000-1200 {\n+\t\t\topp-microvolt = <1200000 1200000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <636000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1200>;\n+\t\t};\n+\n+\t\topp-672000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <672000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\n+\t\topp-828000000-1390 {\n+\t\t\topp-microvolt = <1390000 1390000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <828000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1390>;\n+\t\t};\n+\t};\n+\n+\tgr3d_dvfs_opp_table: opp-table-gr3d {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-192000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <192000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-240000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-228000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <228000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-300000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <300000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-300000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <300000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-384000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <384000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-396000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <396000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-468000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <468000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-492000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <492000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-528000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <528000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-516000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <516000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-564000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <564000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-552000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <552000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\n+\t\topp-600000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <600000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\n+\t\topp-600000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <600000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\n+\t\topp-636000000-1200 {\n+\t\t\topp-microvolt = <1200000 1200000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <636000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1200>;\n+\t\t};\n+\n+\t\topp-672000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <672000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\n+\t\topp-828000000-1390 {\n+\t\t\topp-microvolt = <1390000 1390000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <828000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1390>;\n+\t\t};\n+\t};\n+\n+\tmsenc_dvfs_opp_table: opp-table-msenc {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-144000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <144000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-182000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <182000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-204000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <204000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-240000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-252000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <252000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-312000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <312000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-324000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <324000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-384000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <384000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-408000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <408000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-432000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <432000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-456000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <456000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-480000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <480000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-480000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <480000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\t};\n+\n+\ttsec_dvfs_opp_table: opp-table-tsec {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-144000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <144000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-182000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <182000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-204000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <204000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-240000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-252000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <252000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-312000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <312000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-324000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <324000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-384000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <384000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-408000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <408000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-432000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <432000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-456000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <456000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-480000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <480000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-480000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <480000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\t};\n+\n+\tvde_dvfs_opp_table: opp-table-vde {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-144000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <144000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-182000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <182000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-204000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <204000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-240000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-252000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <252000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-312000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <312000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-324000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <324000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-384000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <384000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-408000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <408000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-432000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <432000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-456000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <456000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-480000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <480000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-480000000-1170 {\n+\t\t\topp-microvolt = <1170000 1170000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <480000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1170>;\n+\t\t};\n+\t};\n+\n+\thost1x_dvfs_opp_table: opp-table-host1x {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-144000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <144000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-180000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <180000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-188000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <188000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-228000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <228000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-240000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <240000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-276000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <276000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\n+\t\topp-276000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <276000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-324000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <324000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-336000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <336000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\n+\t\topp-336000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <336000000>;\n+\t\t\topp-supported-hw = <0x0001>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-372000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <372000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\n+\t\topp-384000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <384000000>;\n+\t\t\topp-supported-hw = <0x000E>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\t};\n+\n+\tpll_m_dvfs_opp_table: opp-table-pllm {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-800000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <800000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-1066000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <1066000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\t};\n+\n+\tpll_c_dvfs_opp_table: opp-table-pllc {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-800000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <800000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-1066000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <1066000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\t};\n+\n+\tpll_c2_dvfs_opp_table: opp-table-pllc2 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-800000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <800000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-1066000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <1066000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\t};\n+\n+\tpll_c3_dvfs_opp_table: opp-table-pllc3 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-800000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <800000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-1066000000-1000 {\n+\t\t\topp-microvolt = <1000000 1000000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <1066000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1000>;\n+\t\t};\n+\t};\n+\n+\tsbc1_dvfs_opp_table: opp-table-sbc1 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-48000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <48000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-52000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <52000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\t};\n+\n+\tsbc2_dvfs_opp_table: opp-table-sbc2 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-48000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <48000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-52000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <52000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\t};\n+\n+\tsbc3_dvfs_opp_table: opp-table-sbc3 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-48000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <48000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-52000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <52000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\t};\n+\n+\tsbc4_dvfs_opp_table: opp-table-sbc4 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-48000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <48000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-52000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <52000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\t};\n+\n+\tsbc5_dvfs_opp_table: opp-table-sbc5 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-48000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <48000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-52000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <52000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\t};\n+\n+\tsbc6_dvfs_opp_table: opp-table-sbc6 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-48000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <48000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-52000000-1100 {\n+\t\t\topp-microvolt = <1100000 1100000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <52000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1100>;\n+\t\t};\n+\t};\n+\n+\tsdmmc1_dvfs_opp_table: opp-table-sdmmc1 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-81600000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <81600000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-156000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <156000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-204000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <204000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\t};\n+\n+\tsdmmc3_dvfs_opp_table: opp-table-sdmmc3 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-81600000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <81600000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-156000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <156000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-204000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <204000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\t};\n+\n+\tsdmmc4_dvfs_opp_table: opp-table-sdmmc4 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-81600000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <81600000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\n+\t\topp-156000000-1120 {\n+\t\t\topp-microvolt = <1120000 1120000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <156000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1120>;\n+\t\t};\n+\n+\t\topp-200000000-1250 {\n+\t\t\topp-microvolt = <1250000 1250000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <200000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1250>;\n+\t\t};\n+\t};\n+\n+\thdmi_dvfs_opp_table: opp-table-hdmi {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-148500000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <148500000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-297000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <297000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\t};\n+\n+\tdisp1_dvfs_opp_table: opp-table-disp1 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-166000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <166000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-297000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <297000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\t};\n+\n+\tdisp2_dvfs_opp_table: opp-table-disp2 {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-166000000-900 {\n+\t\t\topp-microvolt = <900000 900000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <166000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_900>;\n+\t\t};\n+\n+\t\topp-297000000-1050 {\n+\t\t\topp-microvolt = <1050000 1050000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <297000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_1050>;\n+\t\t};\n+\t};\n+\n+\txusb_falcon_dvfs_opp_table: opp-table-xusb-falcon {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-336000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <336000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\t};\n+\n+\txusb_host_dvfs_opp_table: opp-table-xusb-host {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-112000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <112000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\t};\n+\n+\txusb_dev_dvfs_opp_table: opp-table-xusb-dev {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-58300000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <58300000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\t};\n+\n+\txusb_ss_dvfs_opp_table: opp-table-xusb-ss {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-122400000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <122400000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\t};\n+\n+\txusb_fs_dvfs_opp_table: opp-table-xusb-fs {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-48000000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <48000000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\t};\n+\n+\txusb_hs_dvfs_opp_table: opp-table-xusb-hs {\n+\t\tcompatible = \"operating-points-v2\";\n+\n+\t\topp-61200000-950 {\n+\t\t\topp-microvolt = <950000 950000 1390000>;\n+\t\t\topp-hz = /bits/ 64 <61200000>;\n+\t\t\topp-supported-hw = <0x000F>;\n+\t\t\trequired-opps = <&core_opp_950>;\n+\t\t};\n+\t};\n+\n+\t/* Add usbd, usb2 and usb3 opp tables if needed */\n };\ndiff --git a/arch/arm/boot/dts/nvidia/tegra114.dtsi b/arch/arm/boot/dts/nvidia/tegra114.dtsi\nindex f46406b06a07..a5958f3a965b 100644\n--- a/arch/arm/boot/dts/nvidia/tegra114.dtsi\n+++ b/arch/arm/boot/dts/nvidia/tegra114.dtsi\n@@ -58,6 +58,8 @@ vi@54080000 {\n \t\t\tclocks = <&tegra_car TEGRA114_CLK_VI>;\n \t\t\tresets = <&tegra_car 20>;\n \t\t\treset-names = \"vi\";\n+\t\t\tpower-domains = <&pd_venc>;\n+\t\t\toperating-points-v2 = <&vi_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_VI>;\n \n@@ -71,6 +73,8 @@ epp@540c0000 {\n \t\t\tclocks = <&tegra_car TEGRA114_CLK_EPP>;\n \t\t\tresets = <&tegra_car TEGRA114_CLK_EPP>;\n \t\t\treset-names = \"epp\";\n+\t\t\tpower-domains = <&pd_heg>;\n+\t\t\toperating-points-v2 = <&epp_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_EPP>;\n \n@@ -84,6 +88,7 @@ isp@54100000 {\n \t\t\tclocks = <&tegra_car TEGRA114_CLK_ISP>;\n \t\t\tresets = <&tegra_car TEGRA114_CLK_ISP>;\n \t\t\treset-names = \"isp\";\n+\t\t\tpower-domains = <&pd_venc>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_ISP>;\n \n@@ -97,6 +102,8 @@ gr2d@54140000 {\n \t\t\tclocks = <&tegra_car TEGRA114_CLK_GR2D>;\n \t\t\tresets = <&tegra_car 21>, <&mc TEGRA114_MC_RESET_2D>;\n \t\t\treset-names = \"2d\", \"mc\";\n+\t\t\tpower-domains = <&pd_heg>;\n+\t\t\toperating-points-v2 = <&gr2d_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_G2>;\n \t\t};\n@@ -107,6 +114,8 @@ gr3d@54180000 {\n \t\t\tclocks = <&tegra_car TEGRA114_CLK_GR3D>;\n \t\t\tresets = <&tegra_car 24>, <&mc TEGRA114_MC_RESET_3D>;\n \t\t\treset-names = \"3d\", \"mc\";\n+\t\t\tpower-domains = <&pd_3d>;\n+\t\t\toperating-points-v2 = <&gr3d_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_NV>;\n \t\t};\n@@ -120,6 +129,8 @@ dc@54200000 {\n \t\t\tclock-names = \"dc\", \"parent\";\n \t\t\tresets = <&tegra_car 27>;\n \t\t\treset-names = \"dc\";\n+\t\t\tpower-domains = <&pd_core>;\n+\t\t\toperating-points-v2 = <&disp1_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_DC>;\n \n@@ -150,6 +161,8 @@ dc@54240000 {\n \t\t\tclock-names = \"dc\", \"parent\";\n \t\t\tresets = <&tegra_car 26>;\n \t\t\treset-names = \"dc\";\n+\t\t\tpower-domains = <&pd_core>;\n+\t\t\toperating-points-v2 = <&disp2_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_DCB>;\n \n@@ -180,6 +193,8 @@ hdmi@54280000 {\n \t\t\tclock-names = \"hdmi\", \"parent\";\n \t\t\tresets = <&tegra_car 51>;\n \t\t\treset-names = \"hdmi\";\n+\t\t\tpower-domains = <&pd_core>;\n+\t\t\toperating-points-v2 = <&hdmi_dvfs_opp_table>;\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n@@ -193,6 +208,7 @@ dsia: dsi@54300000 {\n \t\t\tresets = <&tegra_car 48>;\n \t\t\treset-names = \"dsi\";\n \t\t\tnvidia,mipi-calibrate = <&mipi 0x060>; /* DSIA & DSIB pads */\n+\t\t\tpower-domains = <&pd_core>;\n \t\t\tstatus = \"disabled\";\n \n \t\t\t#address-cells = <1>;\n@@ -209,6 +225,7 @@ dsib: dsi@54400000 {\n \t\t\tresets = <&tegra_car 82>;\n \t\t\treset-names = \"dsi\";\n \t\t\tnvidia,mipi-calibrate = <&mipi 0x180>; /* DSIC & DSID pads */\n+\t\t\tpower-domains = <&pd_core>;\n \t\t\tstatus = \"disabled\";\n \n \t\t\t#address-cells = <1>;\n@@ -222,6 +239,8 @@ msenc@544c0000 {\n \t\t\tclocks = <&tegra_car TEGRA114_CLK_MSENC>;\n \t\t\tresets = <&tegra_car TEGRA114_CLK_MSENC>;\n \t\t\treset-names = \"mpe\";\n+\t\t\tpower-domains = <&pd_mpe>;\n+\t\t\toperating-points-v2 = <&msenc_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_MSENC>;\n \n@@ -234,6 +253,8 @@ tsec@54500000 {\n \t\t\tinterrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n \t\t\tclocks = <&tegra_car TEGRA114_CLK_TSEC>;\n \t\t\tresets = <&tegra_car TEGRA114_CLK_TSEC>;\n+\t\t\tpower-domains = <&pd_core>;\n+\t\t\toperating-points-v2 = <&tsec_dvfs_opp_table>;\n \n \t\t\tiommus = <&mc TEGRA_SWGROUP_TSEC>;\n \n@@ -393,6 +414,8 @@ vde@6001a000 {\n \t\treset-names = \"vde\", \"mc\";\n \t\tresets = <&tegra_car 61>, <&mc TEGRA114_MC_RESET_VDE>;\n \t\tiommus = <&mc TEGRA_SWGROUP_VDE>;\n+\t\tpower-domains = <&pd_vde>;\n+\t\toperating-points-v2 = <&vde_dvfs_opp_table>;\n \t};\n \n \tapbmisc@70000800 {\n@@ -470,6 +493,7 @@ pwm: pwm@7000a000 {\n \t\tclocks = <&tegra_car TEGRA114_CLK_PWM>;\n \t\tresets = <&tegra_car 17>;\n \t\treset-names = \"pwm\";\n+\t\tpower-domains = <&pd_core>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -560,6 +584,8 @@ spi@7000d400 {\n \t\treset-names = \"spi\";\n \t\tdmas = <&apbdma 15>, <&apbdma 15>;\n \t\tdma-names = \"rx\", \"tx\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sbc1_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -575,6 +601,8 @@ spi@7000d600 {\n \t\treset-names = \"spi\";\n \t\tdmas = <&apbdma 16>, <&apbdma 16>;\n \t\tdma-names = \"rx\", \"tx\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sbc2_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -590,6 +618,8 @@ spi@7000d800 {\n \t\treset-names = \"spi\";\n \t\tdmas = <&apbdma 17>, <&apbdma 17>;\n \t\tdma-names = \"rx\", \"tx\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sbc3_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -605,6 +635,8 @@ spi@7000da00 {\n \t\treset-names = \"spi\";\n \t\tdmas = <&apbdma 18>, <&apbdma 18>;\n \t\tdma-names = \"rx\", \"tx\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sbc4_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -620,6 +652,8 @@ spi@7000dc00 {\n \t\treset-names = \"spi\";\n \t\tdmas = <&apbdma 27>, <&apbdma 27>;\n \t\tdma-names = \"rx\", \"tx\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sbc5_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -635,6 +669,8 @@ spi@7000de00 {\n \t\treset-names = \"spi\";\n \t\tdmas = <&apbdma 28>, <&apbdma 28>;\n \t\tdma-names = \"rx\", \"tx\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sbc6_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -661,6 +697,86 @@ tegra_pmc: pmc@7000e400 {\n \t\tclocks = <&tegra_car TEGRA114_CLK_PCLK>, <&clk32k_in>;\n \t\tclock-names = \"pclk\", \"clk32k_in\";\n \t\t#clock-cells = <1>;\n+\n+\t\tpd_core: core-domain {\n+\t\t\t#power-domain-cells = <0>;\n+\t\t\toperating-points-v2 = <&core_opp_table>;\n+\t\t};\n+\n+\t\tpowergates {\n+\t\t\t/*\n+\t\t\t * TODO: Add DIS and DISB domains once DC is able\n+\t\t\t * to handle them properly. VENC and DISB should\n+\t\t\t * set DIS as their source power domain due to\n+\t\t\t * internal dependency.\n+\t\t\t */\n+\n+\t\t\tpd_heg: heg {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_GR2D>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_EPP>;\n+\t\t\t\tresets = <&mc TEGRA114_MC_RESET_2D>,\n+\t\t\t\t\t <&mc TEGRA114_MC_RESET_EPP>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_GR2D>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_EPP>;\n+\t\t\t\tpower-domains = <&pd_core>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\n+\t\t\tpd_mpe: mpe {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_MSENC>;\n+\t\t\t\tresets = <&mc TEGRA114_MC_RESET_MPE>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_MSENC>;\n+\t\t\t\tpower-domains = <&pd_core>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\n+\t\t\tpd_3d: td {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_GR3D>;\n+\t\t\t\tresets = <&mc TEGRA114_MC_RESET_3D>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_GR3D>;\n+\t\t\t\tpower-domains = <&pd_core>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\n+\t\t\tpd_vde: vdec {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_VDE>;\n+\t\t\t\tresets = <&mc TEGRA114_MC_RESET_VDE>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_VDE>;\n+\t\t\t\tpower-domains = <&pd_core>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\n+\t\t\tpd_venc: venc {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_ISP>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_VI>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_CSI>;\n+\t\t\t\tresets = <&mc TEGRA114_MC_RESET_ISP>,\n+\t\t\t\t\t <&mc TEGRA114_MC_RESET_VI>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_ISP>,\n+\t\t\t\t\t <&tegra_car 20 /* VI */>,\n+\t\t\t\t\t <&tegra_car TEGRA114_CLK_CSI>;\n+\t\t\t\tpower-domains = <&pd_core>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\n+\t\t\tpd_xusbss: xusba {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_XUSB_SS>;\n+\t\t\t\tresets = <&tegra_car TEGRA114_CLK_XUSB_SS>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\n+\t\t\tpd_xusbdev: xusbb {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_XUSB_DEV>;\n+\t\t\t\tresets = <&tegra_car 95>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\n+\t\t\tpd_xusbhost: xusbc {\n+\t\t\t\tclocks = <&tegra_car TEGRA114_CLK_XUSB_HOST>;\n+\t\t\t\tresets = <&tegra_car TEGRA114_CLK_XUSB_HOST>;\n+\t\t\t\t#power-domain-cells = <0>;\n+\t\t\t};\n+\t\t};\n \t};\n \n \tfuse@7000f800 {\n@@ -670,6 +786,7 @@ fuse@7000f800 {\n \t\tclock-names = \"fuse\";\n \t\tresets = <&tegra_car 39>;\n \t\treset-names = \"fuse\";\n+\t\tpower-domains = <&pd_core>;\n \t};\n \n \tmc: memory-controller@70019000 {\n@@ -691,6 +808,7 @@ emc: external-memory-controller@7001b000 {\n \t\tinterrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;\n \t\tclocks = <&tegra_car TEGRA114_CLK_EMC>;\n \t\tclock-names = \"emc\";\n+\t\tpower-domains = <&pd_core>;\n \n \t\tnvidia,memory-controller = <&mc>;\n \t\toperating-points-v2 = <&emc_icc_dvfs_opp_table>;\n@@ -885,6 +1003,8 @@ mmc@78000000 {\n \t\tclock-names = \"sdhci\";\n \t\tresets = <&tegra_car 14>;\n \t\treset-names = \"sdhci\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sdmmc1_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -907,6 +1027,8 @@ mmc@78000400 {\n \t\tclock-names = \"sdhci\";\n \t\tresets = <&tegra_car 69>;\n \t\treset-names = \"sdhci\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sdmmc3_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -918,6 +1040,8 @@ mmc@78000600 {\n \t\tclock-names = \"sdhci\";\n \t\tresets = <&tegra_car 15>;\n \t\treset-names = \"sdhci\";\n+\t\tpower-domains = <&pd_core>;\n+\t\toperating-points-v2 = <&sdmmc4_dvfs_opp_table>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -930,6 +1054,7 @@ usb@7d000000 {\n \t\tresets = <&tegra_car 22>;\n \t\treset-names = \"usb\";\n \t\tnvidia,phy = <&phy1>;\n+\t\tpower-domains = <&pd_core>;\n \t\tstatus = \"disabled\";\n \t};\n \n@@ -970,6 +1095,7 @@ usb@7d008000 {\n \t\tresets = <&tegra_car 59>;\n \t\treset-names = \"usb\";\n \t\tnvidia,phy = <&phy3>;\n+\t\tpower-domains = <&pd_core>;\n \t\tstatus = \"disabled\";\n \t};\n \n","prefixes":["v2","7/7"]}