{"id":2228599,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228599/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427060928.2322570-6-max.chou@sifive.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260427060928.2322570-6-max.chou@sifive.com>","date":"2026-04-27T06:09:24","name":"[v5,5/9] target/riscv: rvv: Make vfncvtbf16.f.f.w support BF16 to OFP8 conversion for Zvfofp8min extension","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3e38495081b6e3b58f9d46142db107222397e3cf","submitter":{"id":86650,"url":"http://patchwork.ozlabs.org/api/1.1/people/86650/?format=json","name":"Max Chou","email":"max.chou@sifive.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260427060928.2322570-6-max.chou@sifive.com/mbox/","series":[{"id":501579,"url":"http://patchwork.ozlabs.org/api/1.1/series/501579/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501579","date":"2026-04-27T06:09:19","name":"target/riscv: Add RISC-V Zvfofp8min extension support","version":5,"mbox":"http://patchwork.ozlabs.org/series/501579/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228599/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228599/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=sifive.com header.i=@sifive.com header.a=rsa-sha256\n header.s=google header.b=NwztRuMv;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3tW63ZBSz1xvV\n\tfor ; Mon, 27 Apr 2026 16:11:46 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wHFAW-0005ti-8t; Mon, 27 Apr 2026 02:10:08 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wHFAJ-0005UV-4s\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 02:09:55 -0400","from mail-pj1-x102c.google.com ([2607:f8b0:4864:20::102c])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wHFAG-0000t0-RZ\n for qemu-devel@nongnu.org; Mon, 27 Apr 2026 02:09:54 -0400","by mail-pj1-x102c.google.com with SMTP id\n 98e67ed59e1d1-35dac556bb2so5532001a91.1\n for ; Sun, 26 Apr 2026 23:09:52 -0700 (PDT)","from duncan.localdomain (114-35-142-126.hinet-ip.hinet.net.\n [114.35.142.126]) by smtp.gmail.com with ESMTPSA id\n 98e67ed59e1d1-361410bac6dsm30290710a91.14.2026.04.26.23.09.49\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Sun, 26 Apr 2026 23:09:51 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=sifive.com; s=google; t=1777270191; x=1777874991; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=zkL3jPcMswiVx/VRRzQf1eV73SetidZ9/3wOAro8ohA=;\n b=NwztRuMvz7YSeu28w6Uf2lcPAo0mOyaCfgZ2B30PnVkE8AOlthLOB6BE0N3ZfIbG3X\n 8o4i+FcxYbp2akK37ueZIUDQN6xD4oE7tHwg48unsk0pzDYdbuItbGDUFDvBTdB30+2i\n ysnbncjyPsudy0/IPImkRgkZDMSC2UPIs75N8muyhUzt5y53NUm3Se5IEUUKPeeDaQ6X\n Lsxl/imBGvC3g76btIEzRMUMev2SQRvyuzPxDVEnMBuIyMLT2kOOXV1+HWZrNoBO+910\n Ln21zm1LUv7bGKQSl1vkMIc3c8ToFABRWn1vCGs/18IHNqtWiA+jE1g2suIy2BI0JJbk\n V7zw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1777270191; x=1777874991;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=zkL3jPcMswiVx/VRRzQf1eV73SetidZ9/3wOAro8ohA=;\n b=GUt62L6XFjXlirRSPIgRMNXTHlDyFgQ+zRnpAz4emGz+0cw5c0qXRHE3obT9b5DAdl\n iyTnI8Q8LjRupvrGGgzIduiPa7ESEWxIYTWD+A1CqJCCOweKRcRcnvDvknpnAB4Ej3vW\n mjXieqIgJqiuCzgAKB5CivYW3EBPKq6eVtqyVext2ip8CljPZfAKFy2juFhiMjPip77e\n pOm2XqOFMFlqOwe48gLLcKakAFStrCAc2d39NdB5w6uPjEyf6p0OdJQQQczzl1oQ86x6\n vgL8XXMsuAGwVP/8uB/ynvXvawREH7Nw8quUHW6jpg5WrrgrBo484Llr6Eo9DHmq1CaR\n WQzg==","X-Gm-Message-State":"AOJu0YwCW8DEJT9Oydo1mKkJEBZ8jQFt+2q5yBnn4pfBnqpSoOyHGJZT\n AhlbgDZcV1mpmsr6GurWQvjF3+gGr8uPAenCHrCwuzxEqx02Vhw1zPb9t3TT9CnCpb2E/bG+LFR\n xd4zDOGgNIAove9Hy19SFWzjQMiJFIFjkrW2neuWOHXD9hqakfy0ArUZns/9QmA5PSHqTRLTmZp\n 51/fmJ7X4dJ/ZotDiJJBM402Px2F3qtgyAPhFr6WA=","X-Gm-Gg":"AeBDiesj3GXqYjBZkR8DDDDILIS6x9TOs8zIftL69Mhy9WMQYGamda9zqYyQHjRY01z\n cYl/1B9EqSGb8Leze0iYVM17YdyiMTF3ZmDVEd3cjV2QJ8PBFzncd4LU18OJLnK9rHOeqj7DXyz\n 9O887Q0WFyNA8FY6F6gJiJLF0R8tq0IEyT9HygKf4E3LS47Qrl9aOsdNuTTi3AP+aGqqlRVi+Lq\n OQ6YK8chT0ZscS/vgK/wyxJeaQX7uq47o/6YFaVZSL+e3REW7iaug61zpg7Umn9BRhm0IopJcK7\n IU0qX+VU6F0zSTR0ruhCDhCdsGvhiUyUO0175k3J8kctzeNIuYHzcjup7oyDhtUtA2S6NrU4Pkj\n sJt++X5l7iTIyye3IOviu9hdpJu5xacl69i/4/PhsptGSvHHTwAD+XyM3ah1bqIh+ZyQScEb9XI\n /SNjFpq/Sdj4/kyssazPVoEK1oMlvLRUiN6k2oqUuZEdWZHO2TXpDryc+NI1FStRRGXYRBYiYwh\n s94uanedSywnJOwEELgxtoTU6R9bFwjdaupLA==","X-Received":"by 2002:a17:90a:c10f:b0:35e:d012:5a39 with SMTP id\n 98e67ed59e1d1-361404650eemr40252315a91.14.1777270191320;\n Sun, 26 Apr 2026 23:09:51 -0700 (PDT)","From":"Max Chou ","To":"qemu-devel@nongnu.org,\n\tqemu-riscv@nongnu.org","Cc":"Palmer Dabbelt ,\n Alistair Francis ,\n Daniel Henrique Barboza ,\n Weiwei Li , Liu Zhiwei ,\n Chao Liu , Max Chou ,\n Alistair Francis ","Subject":"[PATCH v5 5/9] target/riscv: rvv: Make vfncvtbf16.f.f.w support BF16\n to OFP8 conversion for Zvfofp8min extension","Date":"Mon, 27 Apr 2026 14:09:24 +0800","Message-ID":"<20260427060928.2322570-6-max.chou@sifive.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260427060928.2322570-1-max.chou@sifive.com>","References":"<20260427060928.2322570-1-max.chou@sifive.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2607:f8b0:4864:20::102c;\n envelope-from=max.chou@sifive.com; helo=mail-pj1-x102c.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"According to the Zvfofp8min extension, the vfncvtbf16.f.f.w instruction\nsupports BF16 to OFP8 conversion without saturation when SEW is 8.\nAnd the VTYPE.altfmt field is used to select the OFP8 format.\n* altfmt = 0: BF16 to OFP8.e4m3\n* altfmt = 1: BF16 to OFP8.e5m2\n\nReviewed-by: Chao Liu \nSigned-off-by: Max Chou \n---\n target/riscv/insn_trans/trans_rvbf16.c.inc | 16 ++++++++++++----\n 1 file changed, 12 insertions(+), 4 deletions(-)","diff":"diff --git a/target/riscv/insn_trans/trans_rvbf16.c.inc b/target/riscv/insn_trans/trans_rvbf16.c.inc\nindex 86eb86f615..7e9b0a53a4 100644\n--- a/target/riscv/insn_trans/trans_rvbf16.c.inc\n+++ b/target/riscv/insn_trans/trans_rvbf16.c.inc\n@@ -67,11 +67,20 @@ static bool trans_fcvt_s_bf16(DisasContext *ctx, arg_fcvt_s_bf16 *a)\n static bool trans_vfncvtbf16_f_f_w(DisasContext *ctx, arg_vfncvtbf16_f_f_w *a)\n {\n REQUIRE_FPU;\n- REQUIRE_ZVFBFMIN(ctx);\n \n- if (opfv_narrow_check(ctx, a) && (ctx->sew == MO_16)) {\n+ if (opfv_narrow_check(ctx, a) &&\n+ ((ctx->sew == MO_16 && ctx->cfg_ptr->ext_zvfbfmin) ||\n+ (ctx->sew == MO_8 && ctx->cfg_ptr->ext_zvfofp8min))) {\n+ gen_helper_gvec_3_ptr *fn;\n uint32_t data = 0;\n \n+ if (ctx->sew == MO_16) {\n+ fn = gen_helper_vfncvtbf16_f_f_w;\n+ } else {\n+ fn = ctx->altfmt ? gen_helper_vfncvtbf16_f_f_w_ofp8e5m2 :\n+ gen_helper_vfncvtbf16_f_f_w_ofp8e4m3;\n+ }\n+\n gen_set_rm_chkfrm(ctx, RISCV_FRM_DYN);\n \n data = FIELD_DP32(data, VDATA, VM, a->vm);\n@@ -81,8 +90,7 @@ static bool trans_vfncvtbf16_f_f_w(DisasContext *ctx, arg_vfncvtbf16_f_f_w *a)\n tcg_gen_gvec_3_ptr(vreg_ofs(ctx, a->rd), vreg_ofs(ctx, 0),\n vreg_ofs(ctx, a->rs2), tcg_env,\n ctx->cfg_ptr->vlenb,\n- ctx->cfg_ptr->vlenb, data,\n- gen_helper_vfncvtbf16_f_f_w);\n+ ctx->cfg_ptr->vlenb, data, fn);\n finalize_rvv_inst(ctx);\n return true;\n }\n","prefixes":["v5","5/9"]}