{"id":2228481,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228481/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-54-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260426134002.865628-54-richard.henderson@linaro.org>","date":"2026-04-26T13:39:30","name":"[53/84] fpu: Inline float32_pack_raw into callers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b9dbefdeca4ff5d95e1b437f7ab04ed514b064ec","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-54-richard.henderson@linaro.org/mbox/","series":[{"id":501533,"url":"http://patchwork.ozlabs.org/api/1.1/series/501533/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501533","date":"2026-04-26T13:38:37","name":"fpu: Export some internals for targets","version":1,"mbox":"http://patchwork.ozlabs.org/series/501533/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228481/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228481/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=Loc8+b9V;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3SvP1S8Wz1xvV\n\tfor ; Sun, 26 Apr 2026 23:57:53 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGzpP-0007ML-Ac; Sun, 26 Apr 2026 09:47:21 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wGzno-0005iW-Co\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:45:41 -0400","from mail-pl1-x62a.google.com ([2607:f8b0:4864:20::62a])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wGznk-0001P9-He\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:45:39 -0400","by mail-pl1-x62a.google.com with SMTP id\n d9443c01a7336-2ab077e3f32so39837375ad.3\n for ; Sun, 26 Apr 2026 06:45:36 -0700 (PDT)","from stoup.. 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helo=mail-pl1-x62a.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson \n---\n fpu/softfloat.c | 13 ++++---------\n 1 file changed, 4 insertions(+), 9 deletions(-)","diff":"diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 6d5125eb1b..d1acf383e9 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -673,11 +673,6 @@ static uint64_t pack_raw64(const FloatParts64 *p, const FloatFmt *fmt)\n return ret;\n }\n \n-static float32 QEMU_FLATTEN float32_pack_raw(const FloatParts64 *p)\n-{\n- return make_float32(pack_raw64(p, &float32_params));\n-}\n-\n static float64 QEMU_FLATTEN float64_pack_raw(const FloatParts64 *p)\n {\n return make_float64(pack_raw64(p, &float64_params));\n@@ -1497,7 +1492,7 @@ static float32 float32_round_pack_canonical(FloatParts64 *p,\n float_status *s)\n {\n parts64_uncanon(p, s, &float32_params, false);\n- return float32_pack_raw(p);\n+ return pack_raw64(p, &float32_params);\n }\n \n static FloatParts64 float64_unpack_canonical(float64 f, float_status *s)\n@@ -2035,7 +2030,7 @@ float32_muladd_scalbn(float32 a, float32 b, float32 c,\n if ((flags & float_muladd_negate_result) && !is_nan(pr->cls)) {\n pr->sign ^= 1;\n }\n- return float32_pack_raw(pr);\n+ return pack_raw64(pr, &float32_params);\n }\n \n float64 QEMU_SOFTFLOAT_ATTR\n@@ -4721,7 +4716,7 @@ float32 float32_default_nan(float_status *status)\n \n parts64_default_nan(&p, status);\n p.frac >>= float32_params.frac_shift;\n- return float32_pack_raw(&p);\n+ return pack_raw64(&p, &float32_params);\n }\n \n float64 float64_default_nan(float_status *status)\n@@ -4772,7 +4767,7 @@ float32 float32_silence_nan(float32 a, float_status *status)\n p.frac <<= float32_params.frac_shift;\n parts64_silence_nan(&p, status);\n p.frac >>= float32_params.frac_shift;\n- return float32_pack_raw(&p);\n+ return pack_raw64(&p, &float32_params);\n }\n \n float64 float64_silence_nan(float64 a, float_status *status)\n","prefixes":["53/84"]}