{"id":2228449,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228449/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-48-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260426134002.865628-48-richard.henderson@linaro.org>","date":"2026-04-26T13:39:24","name":"[47/84] fpu: Change parts_float_to_float_narrow to parts128_to_parts64","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6a7b3b5346b81dcc8b1c7921f8676f0f5cfac5b8","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-48-richard.henderson@linaro.org/mbox/","series":[{"id":501533,"url":"http://patchwork.ozlabs.org/api/1.1/series/501533/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501533","date":"2026-04-26T13:38:37","name":"fpu: Export some internals for targets","version":1,"mbox":"http://patchwork.ozlabs.org/series/501533/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228449/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228449/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=S4rvuDy0;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3SmJ6Mkvz1yHg\n\tfor ; Sun, 26 Apr 2026 23:51:43 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGznr-0005lb-GH; Sun, 26 Apr 2026 09:45:43 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wGznV-0005cY-SN\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:45:22 -0400","from mail-pl1-x62e.google.com ([2607:f8b0:4864:20::62e])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wGznU-0001KB-5k\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:45:21 -0400","by mail-pl1-x62e.google.com with SMTP id\n d9443c01a7336-2b788a98557so42446015ad.2\n for ; Sun, 26 Apr 2026 06:45:19 -0700 (PDT)","from stoup.. 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helo=mail-pl1-x62e.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Rename and return FloatParts64 structure.\n\nSigned-off-by: Richard Henderson \n---\n fpu/softfloat.c | 30 +++++++++++++++---------------\n 1 file changed, 15 insertions(+), 15 deletions(-)","diff":"diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 77585fa11f..99f0036d0d 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -2563,29 +2563,31 @@ static void parts128_float_to_float(FloatParts128 *a, float_status *s)\n }\n }\n \n-static void parts_float_to_float_narrow(FloatParts64 *a, FloatParts128 *b,\n- float_status *s)\n+static FloatParts64 parts128_to_parts64(FloatParts128 *b, float_status *s)\n {\n- a->cls = b->cls;\n- a->sign = b->sign;\n- a->exp = b->exp;\n+ FloatParts64 r = {\n+ .cls = b->cls,\n+ .sign = b->sign,\n+ .exp = b->exp,\n+ };\n \n- switch (a->cls) {\n+ switch (r.cls) {\n case float_class_denormal:\n float_raise(float_flag_input_denormal_used, s);\n /* fall through */\n case float_class_normal:\n- frac64_truncjam(a, b);\n+ frac64_truncjam(&r, b);\n break;\n case float_class_snan:\n case float_class_qnan:\n /* Discard the low bits of the NaN. */\n- a->frac = b->frac_hi;\n- parts64_return_nan(a, s);\n+ r.frac = b->frac_hi;\n+ parts64_return_nan(&r, s);\n break;\n default:\n break;\n }\n+ return r;\n }\n \n static void parts_float_to_float_widen(FloatParts128 *a, FloatParts64 *b,\n@@ -2773,18 +2775,16 @@ bfloat16 float64_to_bfloat16(float64 a, float_status *s)\n float32 float128_to_float32(float128 a, float_status *s)\n {\n FloatParts128 p128 = float128_unpack_canonical(a, s);\n- FloatParts64 p64;\n+ FloatParts64 p64 = parts128_to_parts64(&p128, s);\n \n- parts_float_to_float_narrow(&p64, &p128, s);\n return float32_round_pack_canonical(&p64, s);\n }\n \n float64 float128_to_float64(float128 a, float_status *s)\n {\n FloatParts128 p128 = float128_unpack_canonical(a, s);\n- FloatParts64 p64;\n+ FloatParts64 p64 = parts128_to_parts64(&p128, s);\n \n- parts_float_to_float_narrow(&p64, &p128, s);\n return float64_round_pack_canonical(&p64, s);\n }\n \n@@ -2812,7 +2812,7 @@ float32 floatx80_to_float32(floatx80 a, float_status *s)\n FloatParts128 p128;\n \n if (floatx80_unpack_canonical(&p128, a, s)) {\n- parts_float_to_float_narrow(&p64, &p128, s);\n+ p64 = parts128_to_parts64(&p128, s);\n } else {\n parts64_default_nan(&p64, s);\n }\n@@ -2825,7 +2825,7 @@ float64 floatx80_to_float64(floatx80 a, float_status *s)\n FloatParts128 p128;\n \n if (floatx80_unpack_canonical(&p128, a, s)) {\n- parts_float_to_float_narrow(&p64, &p128, s);\n+ p64 = parts128_to_parts64(&p128, s);\n } else {\n parts64_default_nan(&p64, s);\n }\n","prefixes":["47/84"]}