{"id":2228424,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228424/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-80-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260426134002.865628-80-richard.henderson@linaro.org>","date":"2026-04-26T13:39:56","name":"[79/84] fpu: Return struct from parts{64,128}_addsub","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d86aac81666d1e4f2b94c8191697da344b2bca70","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-80-richard.henderson@linaro.org/mbox/","series":[{"id":501533,"url":"http://patchwork.ozlabs.org/api/1.1/series/501533/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501533","date":"2026-04-26T13:38:37","name":"fpu: Export some internals for targets","version":1,"mbox":"http://patchwork.ozlabs.org/series/501533/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228424/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228424/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=vsOS6lcK;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3ShN4Zk2z1yJ1\n\tfor ; Sun, 26 Apr 2026 23:48:20 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGzpl-0000ia-Sn; Sun, 26 Apr 2026 09:47:41 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wGzp2-0006qS-AC\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:47:05 -0400","from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wGzot-0001vX-Nv\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:46:50 -0400","by mail-pl1-x629.google.com with SMTP id\n d9443c01a7336-2aae146b604so62462345ad.3\n for ; Sun, 26 Apr 2026 06:46:46 -0700 (PDT)","from stoup.. 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","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"At the same time, export.\n\nSigned-off-by: Richard Henderson \n---\n include/fpu/softfloat-parts.h | 5 ++++\n fpu/softfloat.c | 30 +++++++++++------------\n fpu/softfloat-parts.c.inc | 45 ++++++++++++++++++-----------------\n 3 files changed, 43 insertions(+), 37 deletions(-)","diff":"diff --git a/include/fpu/softfloat-parts.h b/include/fpu/softfloat-parts.h\nindex f2c31eb7a6..8522b916f3 100644\n--- a/include/fpu/softfloat-parts.h\n+++ b/include/fpu/softfloat-parts.h\n@@ -179,6 +179,11 @@ FloatParts128 parts128_pick_nan(const FloatParts128 *, const FloatParts128 *,\n * Operations\n */\n \n+FloatParts64 parts64_addsub(const FloatParts64 *a, const FloatParts64 *b,\n+ float_status *s, bool subtract);\n+FloatParts128 parts128_addsub(const FloatParts128 *a, const FloatParts128 *b,\n+ float_status *s, bool subtract);\n+\n FloatParts64 parts64_div(const FloatParts64 *a, const FloatParts64 *b,\n float_status *s);\n FloatParts128 parts128_div(const FloatParts128 *a, const FloatParts128 *b,\ndiff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 2db08ca660..484db3ddf6 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -1579,9 +1579,9 @@ float16_addsub(float16 a, float16 b, float_status *status, bool subtract)\n {\n FloatParts64 pa = float16_unpack_canonical(a, status);\n FloatParts64 pb = float16_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_addsub(&pa, &pb, status, subtract);\n+ FloatParts64 pr = parts64_addsub(&pa, &pb, status, subtract);\n \n- return float16_round_pack_canonical(pr, status);\n+ return float16_round_pack_canonical(&pr, status);\n }\n \n float16 float16_add(float16 a, float16 b, float_status *status)\n@@ -1599,9 +1599,9 @@ soft_f32_addsub(float32 a, float32 b, float_status *status, bool subtract)\n {\n FloatParts64 pa = float32_unpack_canonical(a, status);\n FloatParts64 pb = float32_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_addsub(&pa, &pb, status, subtract);\n+ FloatParts64 pr = parts64_addsub(&pa, &pb, status, subtract);\n \n- return float32_round_pack_canonical(pr, status);\n+ return float32_round_pack_canonical(&pr, status);\n }\n \n static float32 soft_f32_add(float32 a, float32 b, float_status *status)\n@@ -1619,9 +1619,9 @@ soft_f64_addsub(float64 a, float64 b, float_status *status, bool subtract)\n {\n FloatParts64 pa = float64_unpack_canonical(a, status);\n FloatParts64 pb = float64_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_addsub(&pa, &pb, status, subtract);\n+ FloatParts64 pr = parts64_addsub(&pa, &pb, status, subtract);\n \n- return float64_round_pack_canonical(pr, status);\n+ return float64_round_pack_canonical(&pr, status);\n }\n \n static float64 soft_f64_add(float64 a, float64 b, float_status *status)\n@@ -1714,9 +1714,9 @@ static float64 float64r32_addsub(float64 a, float64 b, float_status *status,\n {\n FloatParts64 pa = float64_unpack_canonical(a, status);\n FloatParts64 pb = float64_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_addsub(&pa, &pb, status, subtract);\n+ FloatParts64 pr = parts64_addsub(&pa, &pb, status, subtract);\n \n- return float64r32_round_pack_canonical(pr, status);\n+ return float64r32_round_pack_canonical(&pr, status);\n }\n \n float64 float64r32_add(float64 a, float64 b, float_status *status)\n@@ -1734,9 +1734,9 @@ bfloat16_addsub(bfloat16 a, bfloat16 b, float_status *status, bool subtract)\n {\n FloatParts64 pa = bfloat16_unpack_canonical(a, status);\n FloatParts64 pb = bfloat16_unpack_canonical(b, status);\n- FloatParts64 *pr = parts64_addsub(&pa, &pb, status, subtract);\n+ FloatParts64 pr = parts64_addsub(&pa, &pb, status, subtract);\n \n- return bfloat16_round_pack_canonical(pr, status);\n+ return bfloat16_round_pack_canonical(&pr, status);\n }\n \n bfloat16 bfloat16_add(bfloat16 a, bfloat16 b, float_status *status)\n@@ -1754,9 +1754,9 @@ float128_addsub(float128 a, float128 b, float_status *status, bool subtract)\n {\n FloatParts128 pa = float128_unpack_canonical(a, status);\n FloatParts128 pb = float128_unpack_canonical(b, status);\n- FloatParts128 *pr = parts128_addsub(&pa, &pb, status, subtract);\n+ FloatParts128 pr = parts128_addsub(&pa, &pb, status, subtract);\n \n- return float128_round_pack_canonical(pr, status);\n+ return float128_round_pack_canonical(&pr, status);\n }\n \n float128 float128_add(float128 a, float128 b, float_status *status)\n@@ -1772,15 +1772,15 @@ float128 float128_sub(float128 a, float128 b, float_status *status)\n static floatx80 QEMU_FLATTEN\n floatx80_addsub(floatx80 a, floatx80 b, float_status *status, bool subtract)\n {\n- FloatParts128 pa, pb, *pr;\n+ FloatParts128 pa, pb;\n \n if (!floatx80_unpack_canonical(&pa, a, status) ||\n !floatx80_unpack_canonical(&pb, b, status)) {\n return floatx80_default_nan(status);\n }\n \n- pr = parts128_addsub(&pa, &pb, status, subtract);\n- return floatx80_round_pack_canonical(pr, status);\n+ pa = parts128_addsub(&pa, &pb, status, subtract);\n+ return floatx80_round_pack_canonical(&pa, status);\n }\n \n floatx80 floatx80_add(floatx80 a, floatx80 b, float_status *status)\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 244fdd90d2..6d65b7bfe3 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -524,15 +524,14 @@ static void partsN(uncanon)(FloatPartsN *p, float_status *s,\n * according to the IEC/IEEE Standard for Binary Floating-Point\n * Arithmetic.\n */\n-static FloatPartsN *partsN(addsub)(FloatPartsN *a, FloatPartsN *b,\n- float_status *s, bool subtract)\n+FloatPartsN partsN(addsub)(const FloatPartsN *a_orig,\n+ const FloatPartsN *b_orig,\n+ float_status *s, bool subtract)\n {\n- bool b_sign = b->sign ^ subtract;\n- int ab_mask = float_cmask(a->cls) | float_cmask(b->cls);\n+ int ab_mask = float_cmask(a_orig->cls) | float_cmask(b_orig->cls);\n \n if (unlikely(ab_mask & float_cmask_anynan)) {\n- *a = partsN(pick_nan)(a, b, s);\n- return a;\n+ return partsN(pick_nan)(a_orig, b_orig, s);\n }\n \n /*\n@@ -541,10 +540,15 @@ static FloatPartsN *partsN(addsub)(FloatPartsN *a, FloatPartsN *b,\n */\n record_denormals_used(ab_mask, s);\n \n- if (a->sign != b_sign) {\n+ FloatPartsN a = *a_orig;\n+ FloatPartsN b = *b_orig;\n+\n+ b.sign ^= subtract;\n+\n+ if (a.sign != b.sign) {\n /* Subtraction */\n if (likely(cmask_is_only_normals(ab_mask))) {\n- if (partsN(sub_normal)(a, b)) {\n+ if (partsN(sub_normal)(&a, &b)) {\n return a;\n }\n /* Subtract was exact, fall through to set sign. */\n@@ -552,28 +556,27 @@ static FloatPartsN *partsN(addsub)(FloatPartsN *a, FloatPartsN *b,\n }\n \n if (ab_mask == float_cmask_zero) {\n- a->sign = s->float_rounding_mode == float_round_down;\n+ a.sign = s->float_rounding_mode == float_round_down;\n return a;\n }\n \n if (ab_mask & float_cmask_inf) {\n- if (a->cls != float_class_inf) {\n+ if (a.cls != float_class_inf) {\n /* N - Inf */\n- goto return_b;\n+ return b;\n }\n- if (b->cls != float_class_inf) {\n+ if (b.cls != float_class_inf) {\n /* Inf - N */\n return a;\n }\n /* Inf - Inf */\n float_raise(float_flag_invalid | float_flag_invalid_isi, s);\n- *a = partsN(default_nan)(s);\n- return a;\n+ return partsN(default_nan)(s);\n }\n } else {\n /* Addition */\n if (likely(cmask_is_only_normals(ab_mask))) {\n- partsN(add_normal)(a, b);\n+ partsN(add_normal)(&a, &b);\n return a;\n }\n \n@@ -582,20 +585,18 @@ static FloatPartsN *partsN(addsub)(FloatPartsN *a, FloatPartsN *b,\n }\n \n if (ab_mask & float_cmask_inf) {\n- a->cls = float_class_inf;\n+ a.cls = float_class_inf;\n return a;\n }\n }\n \n- if (b->cls == float_class_zero) {\n- g_assert(is_anynorm(a->cls));\n+ if (b.cls == float_class_zero) {\n+ g_assert(is_anynorm(a.cls));\n return a;\n }\n \n- g_assert(a->cls == float_class_zero);\n- g_assert(is_anynorm(b->cls));\n- return_b:\n- b->sign = b_sign;\n+ g_assert(a.cls == float_class_zero);\n+ g_assert(is_anynorm(b.cls));\n return b;\n }\n \n","prefixes":["79/84"]}