{"id":2228421,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228421/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-62-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260426134002.865628-62-richard.henderson@linaro.org>","date":"2026-04-26T13:39:38","name":"[61/84] fpu: Return struct from parts{64,128}_silence_nan","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"cc155488278cd061a6483d1eec7617f96762cf62","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-62-richard.henderson@linaro.org/mbox/","series":[{"id":501533,"url":"http://patchwork.ozlabs.org/api/1.1/series/501533/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501533","date":"2026-04-26T13:38:37","name":"fpu: Export some internals for targets","version":1,"mbox":"http://patchwork.ozlabs.org/series/501533/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228421/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228421/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=E8adwnwh;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3ShG6wnqz1y2d\n\tfor ; Sun, 26 Apr 2026 23:48:14 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGzpR-0007NB-Qb; Sun, 26 Apr 2026 09:47:22 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wGzoG-0005wL-8a\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:46:11 -0400","from mail-pl1-x630.google.com ([2607:f8b0:4864:20::630])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wGzoC-0001WV-Oj\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:46:07 -0400","by mail-pl1-x630.google.com with SMTP id\n d9443c01a7336-2adbfab4501so44256085ad.2\n for ; Sun, 26 Apr 2026 06:45:56 -0700 (PDT)","from stoup.. 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helo=mail-pl1-x630.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Richard Henderson \n---\n fpu/softfloat.c | 10 +++++-----\n fpu/softfloat-parts.c.inc | 6 +++---\n fpu/softfloat-specialize.c.inc | 20 ++++++++++++++------\n 3 files changed, 22 insertions(+), 14 deletions(-)","diff":"diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex fa8913a288..9c1e6fdce4 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -4634,7 +4634,7 @@ float16 float16_silence_nan(float16 a, float_status *status)\n FloatParts64 p = unpack_raw64(&float16_params, a);\n \n p.frac <<= float16_params.frac_shift;\n- parts64_silence_nan(&p, status);\n+ p = parts64_silence_nan(&p, status);\n p.frac >>= float16_params.frac_shift;\n return pack_raw64(&p, &float16_params);\n }\n@@ -4644,7 +4644,7 @@ float32 float32_silence_nan(float32 a, float_status *status)\n FloatParts64 p = unpack_raw64(&float32_params, a);\n \n p.frac <<= float32_params.frac_shift;\n- parts64_silence_nan(&p, status);\n+ p = parts64_silence_nan(&p, status);\n p.frac >>= float32_params.frac_shift;\n return pack_raw64(&p, &float32_params);\n }\n@@ -4654,7 +4654,7 @@ float64 float64_silence_nan(float64 a, float_status *status)\n FloatParts64 p = unpack_raw64(&float64_params, a);\n \n p.frac <<= float64_params.frac_shift;\n- parts64_silence_nan(&p, status);\n+ p = parts64_silence_nan(&p, status);\n p.frac >>= float64_params.frac_shift;\n return pack_raw64(&p, &float64_params);\n }\n@@ -4664,7 +4664,7 @@ bfloat16 bfloat16_silence_nan(bfloat16 a, float_status *status)\n FloatParts64 p = unpack_raw64(&bfloat16_params, a);\n \n p.frac <<= bfloat16_params.frac_shift;\n- parts64_silence_nan(&p, status);\n+ p = parts64_silence_nan(&p, status);\n p.frac >>= bfloat16_params.frac_shift;\n return pack_raw64(&p, &bfloat16_params);\n }\n@@ -4674,7 +4674,7 @@ float128 float128_silence_nan(float128 a, float_status *status)\n FloatParts128 p = float128_unpack_raw(a);\n \n frac128_shl(&p, float128_params.frac_shift);\n- parts128_silence_nan(&p, status);\n+ p = parts128_silence_nan(&p, status);\n frac128_shr(&p, float128_params.frac_shift);\n return float128_pack_raw(&p);\n }\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex ed7080d886..4733755f35 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -23,7 +23,7 @@ static void partsN(return_nan)(FloatPartsN *a, float_status *s)\n if (s->default_nan_mode) {\n *a = partsN(default_nan)(s);\n } else {\n- partsN(silence_nan)(a, s);\n+ *a = partsN(silence_nan)(a, s);\n }\n break;\n case float_class_qnan:\n@@ -109,7 +109,7 @@ static FloatPartsN *partsN(pick_nan)(FloatPartsN *a, FloatPartsN *b,\n }\n \n if (is_snan(ret->cls)) {\n- partsN(silence_nan)(ret, s);\n+ *ret = partsN(silence_nan)(ret, s);\n }\n return ret;\n }\n@@ -179,7 +179,7 @@ static FloatPartsN *partsN(pick_nan_muladd)(FloatPartsN *a, FloatPartsN *b,\n }\n \n if (is_snan(ret->cls)) {\n- partsN(silence_nan)(ret, s);\n+ *ret = partsN(silence_nan)(ret, s);\n }\n return ret;\n \ndiff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc\nindex dd65432813..2723bf5e61 100644\n--- a/fpu/softfloat-specialize.c.inc\n+++ b/fpu/softfloat-specialize.c.inc\n@@ -179,16 +179,24 @@ static uint64_t parts_silence_nan_frac(uint64_t frac, float_status *status)\n return frac;\n }\n \n-static void parts64_silence_nan(FloatParts64 *p, float_status *status)\n+static FloatParts64 parts64_silence_nan(const FloatParts64 *p,\n+ float_status *status)\n {\n- p->frac = parts_silence_nan_frac(p->frac, status);\n- p->cls = float_class_qnan;\n+ FloatParts64 r = *p;\n+\n+ r.frac = parts_silence_nan_frac(r.frac, status);\n+ r.cls = float_class_qnan;\n+ return r;\n }\n \n-static void parts128_silence_nan(FloatParts128 *p, float_status *status)\n+static FloatParts128 parts128_silence_nan(const FloatParts128 *p,\n+ float_status *status)\n {\n- p->frac_hi = parts_silence_nan_frac(p->frac_hi, status);\n- p->cls = float_class_qnan;\n+ FloatParts128 r = *p;\n+\n+ r.frac_hi = parts_silence_nan_frac(r.frac_hi, status);\n+ r.cls = float_class_qnan;\n+ return r;\n }\n \n /*----------------------------------------------------------------------------\n","prefixes":["61/84"]}