{"id":2228407,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228407/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-7-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260426134002.865628-7-richard.henderson@linaro.org>","date":"2026-04-26T13:38:43","name":"[06/84] fpu: Drop parts_return_nan","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"65485f15f4976d1f8f06625a79a4fca810bb6650","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260426134002.865628-7-richard.henderson@linaro.org/mbox/","series":[{"id":501533,"url":"http://patchwork.ozlabs.org/api/1.1/series/501533/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501533","date":"2026-04-26T13:38:37","name":"fpu: Export some internals for targets","version":1,"mbox":"http://patchwork.ozlabs.org/series/501533/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228407/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228407/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=h14aDPIA;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3Sf76z3Fz1y2d\n\tfor ; Sun, 26 Apr 2026 23:46:23 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGzit-0006y8-VH; Sun, 26 Apr 2026 09:40:37 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wGzio-0006u5-A0\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:40:31 -0400","from mail-pl1-x633.google.com ([2607:f8b0:4864:20::633])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wGzil-0008Ju-33\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:40:30 -0400","by mail-pl1-x633.google.com with SMTP id\n d9443c01a7336-2ad617d5b80so54568995ad.1\n for ; Sun, 26 Apr 2026 06:40:25 -0700 (PDT)","from stoup.. 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helo=mail-pl1-x633.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Use parts{64,128}_return_nan at each call site.\n\nSigned-off-by: Richard Henderson \n---\n fpu/softfloat.c | 17 ++++++-----------\n fpu/softfloat-parts.c.inc | 8 ++++----\n 2 files changed, 10 insertions(+), 15 deletions(-)","diff":"diff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 571b5f09f3..50a625fd0a 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -779,11 +779,6 @@ static float128 QEMU_FLATTEN float128_pack_raw(const FloatParts128 *p)\n FloatParts128 *: parts128_##NAME, \\\n FloatParts256 *: parts256_##NAME)\n \n-static void parts64_return_nan(FloatParts64 *a, float_status *s);\n-static void parts128_return_nan(FloatParts128 *a, float_status *s);\n-\n-#define parts_return_nan(P, S) PARTS_GENERIC_64_128(return_nan, P)(P, S)\n-\n static FloatParts64 *parts64_pick_nan(FloatParts64 *a, FloatParts64 *b,\n float_status *s);\n static FloatParts128 *parts128_pick_nan(FloatParts128 *a, FloatParts128 *b,\n@@ -2831,7 +2826,7 @@ static void parts_float_to_e5m2(FloatParts64 *a, float_status *s, bool saturate)\n switch (a->cls) {\n case float_class_snan:\n case float_class_qnan:\n- parts_return_nan(a, s);\n+ parts64_return_nan(a, s);\n break;\n \n case float_class_inf:\n@@ -2858,7 +2853,7 @@ static void parts_float_to_e5m2(FloatParts64 *a, float_status *s, bool saturate)\n static void parts64_float_to_float(FloatParts64 *a, float_status *s)\n {\n if (is_nan(a->cls)) {\n- parts_return_nan(a, s);\n+ parts64_return_nan(a, s);\n }\n if (a->cls == float_class_denormal) {\n float_raise(float_flag_input_denormal_used, s);\n@@ -2868,7 +2863,7 @@ static void parts64_float_to_float(FloatParts64 *a, float_status *s)\n static void parts128_float_to_float(FloatParts128 *a, float_status *s)\n {\n if (is_nan(a->cls)) {\n- parts_return_nan(a, s);\n+ parts128_return_nan(a, s);\n }\n if (a->cls == float_class_denormal) {\n float_raise(float_flag_input_denormal_used, s);\n@@ -2896,7 +2891,7 @@ static void parts_float_to_float_narrow(FloatParts64 *a, FloatParts128 *b,\n case float_class_qnan:\n /* Discard the low bits of the NaN. */\n a->frac = b->frac_hi;\n- parts_return_nan(a, s);\n+ parts64_return_nan(a, s);\n break;\n default:\n break;\n@@ -2912,7 +2907,7 @@ static void parts_float_to_float_widen(FloatParts128 *a, FloatParts64 *b,\n frac_widen(a, b);\n \n if (is_nan(a->cls)) {\n- parts_return_nan(a, s);\n+ parts128_return_nan(a, s);\n }\n if (a->cls == float_class_denormal) {\n float_raise(float_flag_input_denormal_used, s);\n@@ -5474,7 +5469,7 @@ float32 float32_exp2(float32 a, float_status *status)\n break;\n case float_class_snan:\n case float_class_qnan:\n- parts_return_nan(&xp, status);\n+ parts64_return_nan(&xp, status);\n return float32_round_pack_canonical(&xp, status);\n case float_class_inf:\n return xp.sign ? float32_zero : a;\ndiff --git a/fpu/softfloat-parts.c.inc b/fpu/softfloat-parts.c.inc\nindex 0d4a63fbff..3bde254bfe 100644\n--- a/fpu/softfloat-parts.c.inc\n+++ b/fpu/softfloat-parts.c.inc\n@@ -941,7 +941,7 @@ static void partsN(sqrt)(FloatPartsN *a, float_status *status,\n break;\n case float_class_snan:\n case float_class_qnan:\n- parts_return_nan(a, status);\n+ partsN(return_nan)(a, status);\n return;\n case float_class_zero:\n return;\n@@ -1263,7 +1263,7 @@ static void partsN(round_to_int)(FloatPartsN *a, FloatRoundMode rmode,\n switch (a->cls) {\n case float_class_qnan:\n case float_class_snan:\n- parts_return_nan(a, s);\n+ partsN(return_nan)(a, s);\n break;\n case float_class_zero:\n case float_class_inf:\n@@ -1735,7 +1735,7 @@ static void partsN(scalbn)(FloatPartsN *a, int n, float_status *s)\n switch (a->cls) {\n case float_class_snan:\n case float_class_qnan:\n- parts_return_nan(a, s);\n+ partsN(return_nan)(a, s);\n break;\n case float_class_zero:\n case float_class_inf:\n@@ -1770,7 +1770,7 @@ static void partsN(log2)(FloatPartsN *a, float_status *s, const FloatFmt *fmt)\n break;\n case float_class_snan:\n case float_class_qnan:\n- parts_return_nan(a, s);\n+ partsN(return_nan)(a, s);\n return;\n case float_class_zero:\n float_raise(float_flag_divbyzero, s);\n","prefixes":["06/84"]}