{"id":2228204,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2228204/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260423-rk35-cnt-freq-v1-1-8f07677be5ca@cherry.de/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260423-rk35-cnt-freq-v1-1-8f07677be5ca@cherry.de>","date":"2026-04-23T14:05:13","name":"rockchip: fix asm-operand-widths clang warning","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"54049259ed347fab5c294303be7495825281c4ca","submitter":{"id":84425,"url":"http://patchwork.ozlabs.org/api/1.1/people/84425/?format=json","name":"Quentin Schulz","email":"foss+uboot@0leil.net"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260423-rk35-cnt-freq-v1-1-8f07677be5ca@cherry.de/mbox/","series":[{"id":501455,"url":"http://patchwork.ozlabs.org/api/1.1/series/501455/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=501455","date":"2026-04-23T14:05:13","name":"rockchip: fix asm-operand-widths clang warning","version":1,"mbox":"http://patchwork.ozlabs.org/series/501455/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2228204/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2228204/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=0leil.net header.i=@0leil.net header.a=rsa-sha256\n header.s=20231125 header.b=ZEjc7qpy;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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a=rsa-sha256; c=relaxed/relaxed; d=0leil.net;\n s=20231125; t=1776953124;\n bh=Am+dN9nWVO3w1+L7d79/2Oz6ZB6t6UiDiMGAsf3ikNQ=;\n h=From:Date:Subject:To:Cc:From;\n b=ZEjc7qpyWwgvZ9X6riMRGoEaFMayXTrP5n8/XGO2YVOhs3Lpz0sqFJcELO/RMgLM2\n uD7d2n0CO1bYQEbvQ1ym65CNbgF73VEA3H7+oYMVbxniiKhPhG0tAn7MRZOyXEHjO8\n 9agY6eal3tQVR6VmO52lJAnrQ/bqeobDkOLQVj1fVJNEwbclBeTKFDiCTcOj7kyL15\n s5LArYRzwHIJsdoodBXfSzCNnL8if8IR+v2dIZK3vxhhZDaZXC59bCp8PiSrILaICL\n jlj6rj6Bv1wVx6PV/g12H26xvCKoMiAIppWJT7Oq5wBbMAxwxiS0kBPwQJm6kRZnw1\n e41Z+NcepL/GQ==","From":"Quentin Schulz ","Date":"Thu, 23 Apr 2026 16:05:13 +0200","Subject":"[PATCH] rockchip: fix asm-operand-widths clang warning","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260423-rk35-cnt-freq-v1-1-8f07677be5ca@cherry.de>","X-B4-Tracking":"v=1; b=H4sIAAAAAAAC/yXMQQqDMBBA0avIrDsQExXqVUoXOpm0YyHaiYog3\n t3YLt/i/x0Sq3CCtthBeZUkY8wobwXQu4svRvHZYI1tTGUd6sfVSHHGoPxFU997R8F5bwlyMyk\n H2X6/x/PvtPQD03xN4DhO1QXN63EAAAA=","X-Change-ID":"20260423-rk35-cnt-freq-059b3cf3dd2c","To":"u-boot@lists.denx.de","Cc":"Tom Rini , Simon Glass ,\n Philipp Tomsich ,\n Kever Yang , Jonas Karlman ,\n Xuhui Lin , Heiko Stuebner ,\n Marek Vasut ,\n Quentin Schulz ,\n Mark Kettenis ","X-Mailer":"b4 0.15-dev-47773","X-Infomaniak-Routing":"alpha","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Quentin Schulz \n\nCONFIG_COUNTER_FREQUENCY is currently 24000000 for all SoCs, meaning it\nfits in a 32b type. For 64b SoCs, it's an issue since the registers are\n64b.\n\nclang complains that we're trying to fit a 32b value into a 64b\nregister:\n\narch/arm/mach-rockchip/rk3528/rk3528.c:98:45: error: value size does not match register size specified by the constraint and modifier [-Werror,-Wasm-operand-widths]\n 98 | asm volatile(\"msr cntfrq_el0, %0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n | ^\ninclude/generated/autoconf.h:372:34: note: expanded from macro 'CONFIG_COUNTER_FREQUENCY'\n 372 | #define CONFIG_COUNTER_FREQUENCY 24000000\n | ^\n/home/qschulz/work/upstream/u-boot/arch/arm/mach-rockchip/rk3528/rk3528.c:98:32: note: use constraint modifier \"w\"\n 98 | asm volatile(\"msr cntfrq_el0, %0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n | ^~\n | %w0\n\nEven though cntfrq_el0[1] is only using the 32b LSB of its 64b, use the\n'x' operand modifier[2] to force the value to be 64b and fix the\nwarning.\n\n[1] https://developer.arm.com/documentation/ddi0601/2026-03/AArch64-Registers/CNTFRQ-EL0--Counter-timer-Frequency-Register?lang=en\n[2] https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#AArch64-Operand-Modifiers\n\nSuggested-by: Mark Kettenis \nSigned-off-by: Quentin Schulz \n---\n arch/arm/mach-rockchip/rk3528/rk3528.c | 2 +-\n arch/arm/mach-rockchip/rk3576/rk3576.c | 2 +-\n arch/arm/mach-rockchip/rk3588/rk3588.c | 2 +-\n 3 files changed, 3 insertions(+), 3 deletions(-)\n\n\n---\nbase-commit: bfe90a308a94caa9d855440683521ff04122ae2a\nchange-id: 20260423-rk35-cnt-freq-059b3cf3dd2c\n\nBest regards,\n-- \nQuentin Schulz ","diff":"diff --git a/arch/arm/mach-rockchip/rk3528/rk3528.c b/arch/arm/mach-rockchip/rk3528/rk3528.c\nindex f9bfc445b85..a39cb8be9a1 100644\n--- a/arch/arm/mach-rockchip/rk3528/rk3528.c\n+++ b/arch/arm/mach-rockchip/rk3528/rk3528.c\n@@ -95,7 +95,7 @@ void rockchip_stimer_init(void)\n \tif (reg & TIMER_EN)\n \t\treturn;\n \n-\tasm volatile(\"msr cntfrq_el0, %0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n+\tasm volatile(\"msr cntfrq_el0, %x0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n \twritel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);\n \twritel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);\n \twritel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);\ndiff --git a/arch/arm/mach-rockchip/rk3576/rk3576.c b/arch/arm/mach-rockchip/rk3576/rk3576.c\nindex c17ba418ced..e44ebb6e676 100644\n--- a/arch/arm/mach-rockchip/rk3576/rk3576.c\n+++ b/arch/arm/mach-rockchip/rk3576/rk3576.c\n@@ -130,7 +130,7 @@ void rockchip_stimer_init(void)\n \tif (reg & TIMER_EN)\n \t\treturn;\n \n-\tasm volatile(\"msr cntfrq_el0, %0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n+\tasm volatile(\"msr cntfrq_el0, %x0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n \twritel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);\n \twritel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);\n \twritel((TIMER_EN << 16) | TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);\ndiff --git a/arch/arm/mach-rockchip/rk3588/rk3588.c b/arch/arm/mach-rockchip/rk3588/rk3588.c\nindex eedce7b9b08..10f96175a17 100644\n--- a/arch/arm/mach-rockchip/rk3588/rk3588.c\n+++ b/arch/arm/mach-rockchip/rk3588/rk3588.c\n@@ -167,7 +167,7 @@ void rockchip_stimer_init(void)\n \tif (reg & TIMER_EN)\n \t\treturn;\n \n-\tasm volatile(\"msr cntfrq_el0, %0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n+\tasm volatile(\"msr cntfrq_el0, %x0\" : : \"r\" (CONFIG_COUNTER_FREQUENCY));\n \twritel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT0_REG);\n \twritel(0xffffffff, HP_TIMER_BASE + HP_LOAD_COUNT1_REG);\n \twritel(TIMER_EN, HP_TIMER_BASE + HP_CTRL_REG);\n","prefixes":[]}