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Ip=[4.158.2.129];\n Helo=[outbound-uk1.az.dlp.m.darktrace.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n AMS0EPF0000019F.eurprd05.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"These intrinsics (vldr*_gather_base_wb, vstr*_scatter_base_wb) lacked\nmodelling of memory accesses corresponding to writeback: in this case,\nthey both read and write memory.\n\nOK for trunk, gcc-16 and gcc-15?\n\nThanks,\n\nChristophe\n\n2024-04-24 Christophe Lyon \n\n\tPR target/124870\n\tgcc/\n\t* config/arm/arm-mve-builtins-base.cc (vstrq_scatter_base_impl)\n\t(vldrq_gather_base_impl): Fix call_properties.\n\n\tgcc/testsuite/\n\t* gcc.target/arm/mve/intrinsics/pr124870.c: New test.\n---\n gcc/config/arm/arm-mve-builtins-base.cc | 15 +++++++--\n .../gcc.target/arm/mve/intrinsics/pr124870.c | 31 +++++++++++++++++++\n 2 files changed, 44 insertions(+), 2 deletions(-)\n create mode 100644 gcc/testsuite/gcc.target/arm/mve/intrinsics/pr124870.c","diff":"diff --git a/gcc/config/arm/arm-mve-builtins-base.cc b/gcc/config/arm/arm-mve-builtins-base.cc\nindex b344aca3f55..eaac4316d6b 100644\n--- a/gcc/config/arm/arm-mve-builtins-base.cc\n+++ b/gcc/config/arm/arm-mve-builtins-base.cc\n@@ -294,9 +294,12 @@ public:\n : m_to_int_mode (to_int_mode)\n {}\n \n- unsigned int call_properties (const function_instance &) const override\n+ unsigned int call_properties (const function_instance &fi) const override\n {\n- return CP_WRITE_MEMORY;\n+ if (fi.mode_suffix_id == MODE_wb)\n+ return CP_WRITE_MEMORY | CP_READ_MEMORY;\n+ else\n+ return CP_WRITE_MEMORY;\n }\n \n machine_mode memory_vector_mode (const function_instance &fi) const override\n@@ -480,6 +483,14 @@ public:\n return type_suffixes[suffix].vector_mode;\n }\n \n+ unsigned int call_properties (const function_instance &fi) const override\n+ {\n+ if (fi.mode_suffix_id == MODE_wb)\n+ return CP_WRITE_MEMORY | CP_READ_MEMORY;\n+ else\n+ return CP_READ_MEMORY;\n+ }\n+\n rtx expand (function_expander &e) const override\n {\n insn_code icode;\ndiff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr124870.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr124870.c\nnew file mode 100644\nindex 00000000000..cfb41da8039\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr124870.c\n@@ -0,0 +1,31 @@\n+/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */\n+/* { dg-add-options arm_v8_1m_mve_fp } */\n+/* { dg-additional-options \"-O2\" } */\n+\n+/* PR target/124870. */\n+\n+#include \n+\n+#ifdef __cplusplus\n+extern \"C\" {\n+#endif\n+\n+void fn (int n, uint32_t *strides, float32_t *f)\n+{\n+ uint32x4_t vecScGathAddr = vld1q_u32(strides);\n+ float32x4_t vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);\n+ float32x4_t vecB = vecA;\n+ int i;\n+ for (i = 0; i < n; ++i)\n+ {\n+ vecA = vldrwq_gather_base_wb_f32(&vecScGathAddr, 64);\n+ vecB = vaddq_f32 (vecB, vecA);\n+ }\n+ vstrwq_f32 (f, vecB);\n+}\n+\n+#ifdef __cplusplus\n+}\n+#endif\n+\n+/* { dg-final { scan-assembler-times \"vadd.f32\\tq\\[0-9\\]+, q\\[0-9\\]+, q\\[0-9\\]+\" 1 } } */\n","prefixes":[]}