{"id":2227852,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2227852/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260424111330.702272-15-changhuang.liang@starfivetech.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.1/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260424111330.702272-15-changhuang.liang@starfivetech.com>","date":"2026-04-24T11:13:24","name":"[v1,14/20] pinctrl: starfive: Add StarFive JHB100 per2 controller driver","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a89d4bc648fe7898a62f4cf47378081e25be0a9e","submitter":{"id":85771,"url":"http://patchwork.ozlabs.org/api/1.1/people/85771/?format=json","name":"Changhuang Liang","email":"changhuang.liang@starfivetech.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260424111330.702272-15-changhuang.liang@starfivetech.com/mbox/","series":[{"id":501347,"url":"http://patchwork.ozlabs.org/api/1.1/series/501347/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501347","date":"2026-04-24T11:13:16","name":"Add basic pinctrl drivers for JHB100 SoC","version":1,"mbox":"http://patchwork.ozlabs.org/series/501347/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227852/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227852/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n 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","Cc":"linux-gpio@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-riscv@lists.infradead.org,\n\tLianfeng Ouyang ,\n\tChanghuang Liang ","Subject":"[PATCH v1 14/20] pinctrl: starfive: Add StarFive JHB100 per2\n controller driver","Date":"Fri, 24 Apr 2026 04:13:24 -0700","Message-Id":"<20260424111330.702272-15-changhuang.liang@starfivetech.com>","X-Mailer":"git-send-email 2.25.1","In-Reply-To":"<20260424111330.702272-1-changhuang.liang@starfivetech.com>","References":"<20260424111330.702272-1-changhuang.liang@starfivetech.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"SHXPR01CA0025.CHNPR01.prod.partner.outlook.cn\n (2406:e500:c311:1b::34) To ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn\n 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cd059695-448d-4140-880c-08dea1f2940a","X-MS-Exchange-CrossTenant-AuthSource":"\n ZQ4PR01MB1202.CHNPR01.prod.partner.outlook.cn","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"24 Apr 2026 11:13:57.2186\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"06fe3fa3-1221-43d3-861b-5a4ee687a85c","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n 4QiFwjAamil2SywrehiAXly4hhhWrAvGvn1638epbqF4TVGF/SZ7yKrbPBGUNtKdMQefEV0dYCMvOwxXEK2lFgChADdf+/R/PqvpUQOibLCUcbuHNP6d+E42Zh5DUlD7","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"ZQ4PR01MB1156"},"content":"Add pinctrl driver for StarFive JHB100 SoC Peripheral-2(per2) pinctrl\ncontroller.\n\nSigned-off-by: Lianfeng Ouyang \nSigned-off-by: Changhuang Liang \n---\n drivers/pinctrl/starfive/Kconfig | 12 +++\n drivers/pinctrl/starfive/Makefile | 1 +\n .../starfive/pinctrl-starfive-jhb100-per2.c | 102 ++++++++++++++++++\n 3 files changed, 115 insertions(+)\n create mode 100644 drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per2.c","diff":"diff --git a/drivers/pinctrl/starfive/Kconfig b/drivers/pinctrl/starfive/Kconfig\nindex c5937207b2d3..765379bf3d52 100644\n--- a/drivers/pinctrl/starfive/Kconfig\n+++ b/drivers/pinctrl/starfive/Kconfig\n@@ -83,6 +83,18 @@ config PINCTRL_STARFIVE_JHB100_PER1\n \t peripherals supporting inputs, outputs, configuring pull-up/pull-down\n \t and interrupts on input changes.\n \n+config PINCTRL_STARFIVE_JHB100_PER2\n+\ttristate \"StarFive JHB100 SoC Peripheral-2 pinctrl and GPIO driver\"\n+\tdepends on ARCH_STARFIVE || COMPILE_TEST\n+\tdepends on OF\n+\tselect PINCTRL_STARFIVE_JHB100\n+\tdefault ARCH_STARFIVE\n+\thelp\n+\t Say yes here to support Peripheral-2 pin control on the StarFive JHB100 SoC.\n+\t This also provides an interface to the GPIO pins not used by other\n+\t peripherals supporting inputs, outputs, configuring pull-up/pull-down\n+\t and interrupts on input changes.\n+\n config PINCTRL_STARFIVE_JHB100_SYS0\n \ttristate \"StarFive JHB100 SoC System-0 pinctrl and GPIO driver\"\n \tdepends on ARCH_STARFIVE || COMPILE_TEST\ndiff --git a/drivers/pinctrl/starfive/Makefile b/drivers/pinctrl/starfive/Makefile\nindex 6beef7e313ef..33213bd1919f 100644\n--- a/drivers/pinctrl/starfive/Makefile\n+++ b/drivers/pinctrl/starfive/Makefile\n@@ -9,6 +9,7 @@ obj-$(CONFIG_PINCTRL_STARFIVE_JH7110_AON)\t+= pinctrl-starfive-jh7110-aon.o\n obj-$(CONFIG_PINCTRL_STARFIVE_JHB100)\t\t+= pinctrl-starfive-jhb100.o\n obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_PER0)\t+= pinctrl-starfive-jhb100-per0.o\n obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_PER1)\t+= pinctrl-starfive-jhb100-per1.o\n+obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_PER2)\t+= pinctrl-starfive-jhb100-per2.o\n obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0)\t+= pinctrl-starfive-jhb100-sys0.o\n obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS0H)\t+= pinctrl-starfive-jhb100-sys0h.o\n obj-$(CONFIG_PINCTRL_STARFIVE_JHB100_SYS1)\t+= pinctrl-starfive-jhb100-sys1.o\ndiff --git a/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per2.c b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per2.c\nnew file mode 100644\nindex 000000000000..d4c2927f1014\n--- /dev/null\n+++ b/drivers/pinctrl/starfive/pinctrl-starfive-jhb100-per2.c\n@@ -0,0 +1,102 @@\n+// SPDX-License-Identifier: GPL-2.0-or-later\n+/*\n+ * Pinctrl / GPIO driver for StarFive JHB100 SoC Peripheral-2 domain\n+ *\n+ * Copyright (C) 2024 StarFive Technology Co., Ltd.\n+ * Author: Alex Soo \n+ *\n+ */\n+\n+#include \n+#include \n+\n+#include \"pinctrl-starfive-jhb100.h\"\n+\n+static const struct jhb100_pin_layout_desc jhb100_per2_pl_desc[] = {\n+\t{ .pin_start = 0, .pin_cnt = 15, .name = \"gpio\", .gpio_func_sel = 0 },\n+\t{ .pin_start = 15, .pin_cnt = 1, .name = \"gpio\", .gpio_func_sel = -1 },\n+\t{ .pin_start = 16, .pin_cnt = 15, .name = \"gpio\", .gpio_func_sel = 0 },\n+\t{ 0xff },\n+};\n+\n+static struct config_reg_layout_desc jhb100_per2_pinctrl_rl_desc[] = {\n+\t{\n+\t\t.pin_start\t\t\t= 0,\n+\t\t.pin_cnt\t\t\t= 19,\n+\t\t.drive_strength_2bit\t\t= { .shift = 0, .width = 2 },\n+\t\t.input_enable\t\t\t= { .shift = 2, .width = 1 },\n+\t\t.pull_down\t\t\t= { .shift = 3, .width = 1 },\n+\t\t.pull_up\t\t\t= { .shift = 4, .width = 1 },\n+\t\t.slew_rate\t\t\t= { .shift = 5, .width = 1 },\n+\t\t.schmitt_trigger_select\t\t= { .shift = 6, .width = 1 },\n+\t\t.reserved\t\t\t= { .shift = 7, .width = 8 },\n+\t\t.debounce_width\t\t\t= { .shift = 15, .width = 17 },\n+\t},\n+\t{\n+\t\t.pin_start\t\t\t= 19,\n+\t\t.pin_cnt\t\t\t= 12,\n+\t\t.input_enable\t\t\t= { .shift = 0, .width = 1 },\n+\t\t.slew_rate\t\t\t= { .shift = 1, .width = 1 },\n+\t\t.vsel\t\t\t\t= { .shift = 2, .width = 2,\n+\t\t\t\t\t\t .func = BIT(PER2_GMAC_RGMII_FUNC) |\n+\t\t\t\t\t\t\t BIT(PER2_GMAC_RMII_FUNC) },\n+\t\t.reserved\t\t\t= {.shift = 4, .width = 11 },\n+\t\t.debounce_width\t\t\t= {.shift = 15, .width = 17 },\n+\t},\n+\t{ 0xff },\n+};\n+\n+static const struct pinvref_desc pinvref_desc_per2[] = {\n+\t{\n+\t\t.name = \"gpionw\",\n+\t\t.range = BIT(JHB100_PINVREF_1_8V) | BIT(JHB100_PINVREF_2_5V) |\n+\t\t\t BIT(JHB100_PINVREF_3_3V)\n+\t},\n+\t{ NULL },\n+};\n+\n+struct starfive_pinctrl_regs jhb100_per2_pinctrl_regs = {\n+\t.vref\t\t\t= { .reg = 0x00, .pv_desc = pinvref_desc_per2 },\n+\t.config\t\t\t= { .reg = 0x04, .width_per_pin = 1 },\n+\t.output\t\t\t= { .reg = 0x80, .width_per_pin = 1 },\n+\t.output_en\t\t= { .reg = 0x84, .width_per_pin = 1 },\n+\t.gpio_status\t\t= { .reg = 0x88, .width_per_pin = 1 },\n+\t.func_sel\t\t= { .reg = 0x8c, .width_per_pin = 2 },\n+\t.irq_en\t\t\t= { .reg = 0x94, .width_per_pin = 1 },\n+\t.irq_status\t\t= { .reg = 0x98, .width_per_pin = 1 },\n+\t.irq_clr\t\t= { .reg = 0x9c, .width_per_pin = 1 },\n+\t.irq_trigger\t\t= { .reg = 0xa0, .width_per_pin = 1 },\n+\t.irq_level\t\t= { .reg = 0xa4, .width_per_pin = 1 },\n+\t.irq_both_edge\t\t= { .reg = 0xa8, .width_per_pin = 1 },\n+\t.irq_edge\t\t= { .reg = 0xac, .width_per_pin = 1 },\n+};\n+\n+static const struct jhb100_pinctrl_domain_info jhb100_per2_pinctrl_info = {\n+\t.name\t\t\t= \"jhb100-per2\",\n+\t.gc_base\t\t= -1,\n+\t.pl_desc\t\t= jhb100_per2_pl_desc,\n+\t.crl_desc\t\t= jhb100_per2_pinctrl_rl_desc,\n+\t.regs\t\t\t= &jhb100_per2_pinctrl_regs,\n+};\n+\n+static const struct of_device_id jhb100_per2_pinctrl_of_match[] = {\n+\t{\n+\t\t.compatible = \"starfive,jhb100-per2-pinctrl\",\n+\t\t.data = &jhb100_per2_pinctrl_info,\n+\t},\n+\t{ /* sentinel */ }\n+};\n+MODULE_DEVICE_TABLE(of, jhb100_per2_pinctrl_of_match);\n+\n+static struct platform_driver jhb100_per2_pinctrl_driver = {\n+\t.probe = jhb100_pinctrl_probe,\n+\t.driver = {\n+\t\t.name = \"starfive-jhb100-per2-pinctrl\",\n+\t\t.of_match_table = jhb100_per2_pinctrl_of_match,\n+\t},\n+};\n+module_platform_driver(jhb100_per2_pinctrl_driver);\n+\n+MODULE_DESCRIPTION(\"Pinctrl driver for StarFive JHB100 SoC Peripheral-2 domain\");\n+MODULE_AUTHOR(\"Alex Soo \");\n+MODULE_LICENSE(\"GPL\");\n","prefixes":["v1","14/20"]}