{"id":2227778,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2227778/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424083837.214947-9-adityag@linux.ibm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260424083837.214947-9-adityag@linux.ibm.com>","date":"2026-04-24T08:38:35","name":"[v6,08/10] pnv/mpipl: Enable MPIPL support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"de482d6feec4a9679e7ad7e3429820b081f29ef7","submitter":{"id":86610,"url":"http://patchwork.ozlabs.org/api/1.1/people/86610/?format=json","name":"Aditya Gupta","email":"adityag@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424083837.214947-9-adityag@linux.ibm.com/mbox/","series":[{"id":501318,"url":"http://patchwork.ozlabs.org/api/1.1/series/501318/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501318","date":"2026-04-24T08:38:28","name":"Implement MPIPL for PowerNV","version":6,"mbox":"http://patchwork.ozlabs.org/series/501318/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227778/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227778/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=cYdnyTrd;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc\n :content-transfer-encoding:date:from:in-reply-to:message-id\n :mime-version:references:subject:to; s=pp1; bh=3yctLBVUr5itl+sQ2\n ufET2Z+aaKC+3gGfuhINJvRrkQ=; b=cYdnyTrdrkkD/JBynCZ3AdyFqA3BWDofe\n /+PXAahueJgwvXpZJ4V0zKnTgs/4Ts2Bs8ywCpqv3WwpJ+pzTTp2raqQ7gxZb8hY\n HeAPsUeSFOjuXc47gg2PNaLMqPmhj3gvD6s0iLuk96JBk1n0nZa2D0SzTBZQiXPS\n lJJoCAKO4I1itwYbMZyoDKFOPbDInIojzSZ2itYA30L48/7vmdNkIwEh3qH7yOEV\n SbJyUFniZ9lhdNh1re2+bnU3IJ8nCnMSx3pnjglDAFaNZntTVypo5gvImq8j+wck\n 8uTcQmvoM76++vVTOtiYSaJCmmyBpA2s5KyKUiCBsDFNc7kG/aRIw==","From":"Aditya Gupta ","To":"","Cc":", Hari Bathini ,\n Sourabh Jain ,\n Harsh Prateek Bora ,\n Nicholas Piggin ,\n Miles Glenn , Chinmay Rath ,\n Shivang Upadhyay ","Subject":"[PATCH v6 08/10] pnv/mpipl: Enable MPIPL support","Date":"Fri, 24 Apr 2026 14:08:35 +0530","Message-ID":"<20260424083837.214947-9-adityag@linux.ibm.com>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260424083837.214947-1-adityag@linux.ibm.com>","References":"<20260424083837.214947-1-adityag@linux.ibm.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-TM-AS-GCONF":"00","X-Proofpoint-Reinject":"loops=2 maxloops=12","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDI0MDA3NiBTYWx0ZWRfX1H55Vscbolhb\n fD1stkPwLzePXfbxZF2Kn/NvsWwfpOS8Fn+jA0Ng/8AI/7expYfTIk1hRM0qAbpKafMy96VVL6f\n SaNZSSrMUaK/XOv8pfvh7a6G0cE7dmhd2SFgY8RvG1xW0mGnYQ3gU+NuBoI5xKjxhjtHfWGYILB\n HBaPQs7e3VUvoIG9253dZg5CLe/tgGs1+ztc9FjhOGPWgcJkYDs0cW5ejSqMaiKt88OTyBZbnne\n JwvPqH/C4sl1q6wAECpSzQaJ7UJjEpq3VEOmhR+QxiLXenmLHpcK9zupeIeOiTUs7U4eYq88hSC\n W6FS0E7jjfp3VIz9Dmal7M80s0Fq0+5T9GnlSCbzPwlSaX4jRPho7okwZ5pivyhyU6em5bGlV/t\n dYRtoFi/lmngrrQ4pRWHsKw2GyZ+hcFYWCl9WAqzwF4s7RV3A5r5yjC1Vwwi44/3yUply1WMIn9\n fg0xnoeuu53T/3Vij1Q==","X-Proofpoint-ORIG-GUID":"_bZuyExylvwh2yakrnZ0AifGgGjQb0iB","X-Proofpoint-GUID":"k8MiutsbCT9Zv7CdHqqvbhiSSAAFldVV","X-Authority-Analysis":"v=2.4 cv=BYfoFLt2 c=1 sm=1 tr=0 ts=69eb2c46 cx=c_pps\n a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17\n a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22 a=RnoormkPH1_aCDwRdu11:22\n a=RzCfie-kr_QcCd8fBx8p:22 a=VnNF1IyMAAAA:8 a=e4BzM2Stjwk3Es--iV8A:9","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-23_03,2026-04-21_02,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 impostorscore=0 malwarescore=0 suspectscore=0\n lowpriorityscore=0 adultscore=0 spamscore=0 clxscore=1015 bulkscore=0\n phishscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604200000\n definitions=main-2604240076","Received-SPF":"pass client-ip=148.163.158.5;\n envelope-from=adityag@linux.ibm.com;\n helo=mx0b-001b2d01.pphosted.com","X-Spam_score_int":"-26","X-Spam_score":"-2.7","X-Spam_bar":"--","X-Spam_report":"(-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7,\n RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"With all MPIPL support in place, export a \"dump\" node in device tree,\nsignifying that PowerNV QEMU platform supports MPIPL\n\nAlso, export fw-load-area dt node, which has details about where the\nkernel & initrd were loaded, so that kernel can verify whether the\nkernel/initrd images were loaded within the boot memory region. QEMU\njust exports these details in fw-load-area, the check for boot memory\nregion is done in kernel.\n\nSince now device tree can change at pnv_reset, hence regenerate device\ntree during pnv_reset\n\nReviewed-by: Hari Bathini \nReviewed-by: Sourabh Jain \nSigned-off-by: Aditya Gupta \n---\n hw/ppc/pnv.c | 46 +++++++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 45 insertions(+), 1 deletion(-)","diff":"diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c\nindex 48f49bef8251..89096f9a8431 100644\n--- a/hw/ppc/pnv.c\n+++ b/hw/ppc/pnv.c\n@@ -54,6 +54,7 @@\n #include \"hw/ppc/pnv_chip.h\"\n #include \"hw/ppc/pnv_xscom.h\"\n #include \"hw/ppc/pnv_pnor.h\"\n+#include \"hw/ppc/pnv_mpipl.h\"\n \n #include \"hw/isa/isa.h\"\n #include \"hw/char/serial-isa.h\"\n@@ -672,6 +673,39 @@ static void pnv_dt_power_mgt(PnvMachineState *pnv, void *fdt)\n _FDT(fdt_setprop_cell(fdt, off, \"ibm,enabled-stop-levels\", 0xc0000000));\n }\n \n+static void pnv_dt_mpipl_dump(PnvMachineState *pnv, void *fdt)\n+{\n+ int off;\n+\n+ /*\n+ * Add \"dump\" node so kernel knows MPIPL (aka fadump) is supported\n+ *\n+ * Note: This is only needed to be done since we are passing device tree to\n+ * opal\n+ *\n+ * In case HDAT is supported in future, then opal can add these nodes by\n+ * itself based on system attribute having MPIPL_SUPPORTED bit set\n+ */\n+ off = fdt_add_subnode(fdt, 0, \"ibm,opal\");\n+ if (off == -FDT_ERR_EXISTS) {\n+ off = fdt_path_offset(fdt, \"/ibm,opal\");\n+ }\n+\n+ _FDT(off);\n+ off = fdt_add_subnode(fdt, off, \"dump\");\n+ _FDT(off);\n+ _FDT((fdt_setprop_string(fdt, off, \"compatible\", \"ibm,opal-dump\")));\n+\n+ /* Add kernel and initrd as fw-load-area */\n+ uint64_t fw_load_area[4] = {\n+ cpu_to_be64(KERNEL_LOAD_ADDR), cpu_to_be64(KERNEL_MAX_SIZE),\n+ cpu_to_be64(INITRD_LOAD_ADDR), cpu_to_be64(INITRD_MAX_SIZE)\n+ };\n+\n+ _FDT((fdt_setprop(fdt, off, \"fw-load-area\",\n+ fw_load_area, sizeof(fw_load_area))));\n+}\n+\n static void *pnv_dt_create(MachineState *machine)\n {\n PnvMachineClass *pmc = PNV_MACHINE_GET_CLASS(machine);\n@@ -734,6 +768,9 @@ static void *pnv_dt_create(MachineState *machine)\n pmc->dt_power_mgt(pnv, fdt);\n }\n \n+ /* Advertise support for MPIPL */\n+ pnv_dt_mpipl_dump(pnv, fdt);\n+\n return fdt;\n }\n \n@@ -765,6 +802,10 @@ static void pnv_reset(MachineState *machine, ResetType type)\n mpipl_write_succeeded = do_mpipl_write(pnv);\n }\n \n+ /* Regenerate device tree */\n+ fdt = pnv_dt_create(machine);\n+ _FDT((fdt_pack(fdt)));\n+\n /*\n * If it's a MPIPL boot, add the \"mpipl-boot\" property, and reset the\n * boolean for MPIPL boot for next boot\n@@ -814,8 +855,11 @@ static void pnv_reset(MachineState *machine, ResetType type)\n sizeof(proc_area));\n }\n \n- fdt = machine->fdt;\n cpu_physical_memory_write(PNV_FDT_ADDR, fdt, fdt_totalsize(fdt));\n+\n+ /* Free previous device tree set by pnv_init/reset/machine_init_done */\n+ g_free(machine->fdt);\n+ machine->fdt = fdt;\n }\n \n static ISABus *pnv_chip_power8_isa_create(PnvChip *chip, Error **errp)\n","prefixes":["v6","08/10"]}