{"id":2227746,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2227746/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424080508.53992-18-jamin_lin@aspeedtech.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260424080508.53992-18-jamin_lin@aspeedtech.com>","date":"2026-04-24T08:05:32","name":"[v5,17/18] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA addressing","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d4038c5ca4d61508e241aca13114954be218106f","submitter":{"id":81768,"url":"http://patchwork.ozlabs.org/api/1.1/people/81768/?format=json","name":"Jamin Lin","email":"jamin_lin@aspeedtech.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424080508.53992-18-jamin_lin@aspeedtech.com/mbox/","series":[{"id":501315,"url":"http://patchwork.ozlabs.org/api/1.1/series/501315/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501315","date":"2026-04-24T08:05:08","name":"hw/usb/ehci: Add 64-bit descriptor addressing support","version":5,"mbox":"http://patchwork.ozlabs.org/series/501315/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227746/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227746/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=HQDAE5aQ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Tsirkin\" , Paolo Bonzini ,\n Richard Henderson ,\n Laurent Vivier , Nicholas Piggin ,\n Harsh Prateek Bora ,\n Ilya Leoshkevich , David Hildenbrand ,\n Halil Pasic ,\n Christian Borntraeger ,\n Eric Farman , Matthew Rosato ,\n Cornelia Huck ,\n \"open list:ASPEED BMCs\" ,\n \"open list:All patches CC here\" ,\n \"open list:sPAPR pseries\" ,\n \"open list:S390 TCG CPUs\" ","CC":"Jamin Lin , Troy Lee ,\n \"farosas@suse.de\" , \"flwu@google.com\" ,\n \"nabihestefan@google.com\" , =?iso-8859-1?q?C=E9dr?=\n\t=?iso-8859-1?q?ic_Le_Goater?= ","Subject":"[PATCH v5 17/18] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA\n addressing","Thread-Topic":"[PATCH v5 17/18] hw/arm/aspeed_ast27x0: Enable 64-bit EHCI DMA\n addressing","Thread-Index":"AQHc08EfQHPRAYdYyU+9/PcUTUe6Dg==","Date":"Fri, 24 Apr 2026 08:05:32 +0000","Message-ID":"<20260424080508.53992-18-jamin_lin@aspeedtech.com>","References":"<20260424080508.53992-1-jamin_lin@aspeedtech.com>","In-Reply-To":"<20260424080508.53992-1-jamin_lin@aspeedtech.com>","Accept-Language":"zh-TW, en-US","Content-Language":"en-US","X-MS-Has-Attach":"","X-MS-TNEF-Correlator":"","authentication-results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=aspeedtech.com header.i=@aspeedtech.com\n header.a=rsa-sha256 header.s=selector1 header.b=HQDAE5aQ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Therefore, DMA\ntransactions must be capable of accessing 64-bit addresses.\n\nEnable the \"caps-64bit-addr\" property for the EHCI controllers\non AST2700 so that USB DMA operations can correctly handle\n64-bit memory addresses.\n\nSigned-off-by: Jamin Lin \nReviewed-by: Cédric Le Goater \nReviewed-by: Philippe Mathieu-Daudé \n---\n hw/arm/aspeed_ast27x0.c | 2 ++\n 1 file changed, 2 insertions(+)","diff":"diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c\nindex 0cb39dc191..4959cc9e43 100644\n--- a/hw/arm/aspeed_ast27x0.c\n+++ b/hw/arm/aspeed_ast27x0.c\n@@ -858,6 +858,8 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp)\n for (i = 0; i < sc->ehcis_num; i++) {\n object_property_set_int(OBJECT(&s->ehci[i]), \"ctrldssegment-default\",\n 0x4, &error_abort);\n+ object_property_set_bool(OBJECT(&s->ehci[i]), \"caps-64bit-addr\", true,\n+ &error_abort);\n if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) {\n return;\n }\n","prefixes":["v5","17/18"]}