{"id":2227717,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2227717/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260424061958.918404-1-aleksandr.loktionov@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.1/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260424061958.918404-1-aleksandr.loktionov@intel.com>","date":"2026-04-24T06:19:58","name":"[iwl-net] ice: only free LL TS IRQ when the handler is present","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b20890a952af09440b6400331ce47875c46957eb","submitter":{"id":75597,"url":"http://patchwork.ozlabs.org/api/1.1/people/75597/?format=json","name":"Loktionov, Aleksandr","email":"aleksandr.loktionov@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260424061958.918404-1-aleksandr.loktionov@intel.com/mbox/","series":[{"id":501307,"url":"http://patchwork.ozlabs.org/api/1.1/series/501307/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=501307","date":"2026-04-24T06:19:58","name":"[iwl-net] ice: only free LL TS IRQ when the handler is present","version":1,"mbox":"http://patchwork.ozlabs.org/series/501307/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227717/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227717/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=atbylN9/;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.137; 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a=\"77873870\"","E=Sophos;i=\"6.23,196,1770624000\"; d=\"scan'208\";a=\"77873870\"","E=Sophos;i=\"6.23,196,1770624000\"; d=\"scan'208\";a=\"232776879\""],"X-ExtLoop1":"1","From":"Aleksandr Loktionov ","To":"intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com,\n aleksandr.loktionov@intel.com","Cc":"netdev@vger.kernel.org, Sergey Temerkhanov ","Date":"Fri, 24 Apr 2026 08:19:58 +0200","Message-ID":"<20260424061958.918404-1-aleksandr.loktionov@intel.com>","X-Mailer":"git-send-email 2.52.0","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1777011603; x=1808547603;\n h=from:to:cc:subject:date:message-id:mime-version:\n content-transfer-encoding;\n bh=8FCSqw0T65YwOTutmJofsBTnijCoHEsSgp28t0Ta0y8=;\n b=KkZwKtJMCsVWBCOzwxf/Bcvawk9JzX3Wj0JEEOMym0B7vUxx9nKDNM0R\n 7Rt1lSXuno1Qcq4q+C1c0WlmnI7Ln9xybq/e3P3seu94WtDbIPLLXo/qC\n i5L/8XDj2h4UC1R5ULD2tdXGA+bh4F2qmiKHLc7IGpWtENeRZOsa2qE+k\n lF5XyjGp8kispvdanVmR3FJpZ8N9vh6scMxZZX3qyegfna/DhODvfG9Bv\n qcHgtv9O3og52jZQG18SMiRqPB/oKu2skDcjDPhTL14D5LdIuMSrH++Q/\n tU0dJ0dMHVKVhSTBgl0wBlwJkKqAku0h9x1afFiKnAYYlT+QMrYT9uKZS\n g==;","X-Mailman-Original-Authentication-Results":["smtp2.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp2.osuosl.org;\n dkim=pass (2048-bit key,\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=KkZwKtJM"],"Subject":"[Intel-wired-lan] [PATCH iwl-net] ice: only free LL TS IRQ when the\n handler is present","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"From: Sergey Temerkhanov \n\nFree LL TS IRQ handler only when the handler was previously installed.\nUnguarded calls to ice_free_irq_msix_ll_ts() may result in a double\nfree when the LL TS interrupt is not supported by the firmware because\nll_ts_irq.index is zero-initialised and would pass the index >= 0 check.\n\nTrack whether the LL TS IRQ was successfully requested by initialising\nll_ts_irq.index to -ENOENT in ice_init_pf() and when taking the\n\"not supported\" skip path or on request failure, then guard the free\npaths with ll_ts_irq.index >= 0.\n\nFixes: 82e71b226e0e (\"ice: Enable SW interrupt from FW for LL TS\")\nSigned-off-by: Sergey Temerkhanov \nCc: stable@vger.kernel.org\nSigned-off-by: Aleksandr Loktionov \n---\n drivers/net/ethernet/intel/ice/ice_main.c | 10 +++++++---\n 1 file changed, 7 insertions(+), 3 deletions(-)","diff":"diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c\nindex 3c36e36..cc3743a 100644\n--- a/drivers/net/ethernet/intel/ice/ice_main.c\n+++ b/drivers/net/ethernet/intel/ice/ice_main.c\n@@ -3389,7 +3389,7 @@ static void ice_free_irq_msix_misc(struct ice_pf *pf)\n \tdevm_free_irq(ice_pf_to_dev(pf), misc_irq_num, pf);\n \n \tice_free_irq(pf, pf->oicr_irq);\n-\tif (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read)\n+\tif (pf->ll_ts_irq.index >= 0)\n \t\tice_free_irq_msix_ll_ts(pf);\n }\n \n@@ -3473,8 +3473,10 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf)\n \t}\n \n \t/* reserve one vector in irq_tracker for ll_ts interrupt */\n-\tif (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read)\n+\tif (!pf->hw.dev_caps.ts_dev_info.ts_ll_int_read) {\n+\t\tpf->ll_ts_irq.index = -ENOENT;\n \t\tgoto skip_req_irq;\n+\t}\n \n \tirq = ice_alloc_irq(pf, false);\n \tif (irq.index < 0)\n@@ -3487,6 +3489,7 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf)\n \t\tdev_err(dev, \"devm_request_irq for %s failed: %d\\n\",\n \t\t\tpf->int_name_ll_ts, err);\n \t\tice_free_irq(pf, pf->ll_ts_irq);\n+\t\tpf->ll_ts_irq.index = -ENOENT;\n \t\treturn err;\n \t}\n \n@@ -3496,7 +3499,7 @@ static int ice_req_irq_msix_misc(struct ice_pf *pf)\n \tice_ena_ctrlq_interrupts(hw, pf->oicr_irq.index);\n \t/* This enables LL TS interrupt */\n \tpf_intr_start_offset = rd32(hw, PFINT_ALLOC) & PFINT_ALLOC_FIRST;\n-\tif (pf->hw.dev_caps.ts_dev_info.ts_ll_int_read)\n+\tif (pf->ll_ts_irq.index >= 0)\n \t\twr32(hw, PFINT_SB_CTL,\n \t\t ((pf->ll_ts_irq.index + pf_intr_start_offset) &\n \t\t PFINT_SB_CTL_MSIX_INDX_M) | PFINT_SB_CTL_CAUSE_ENA_M);\n@@ -4090,6 +4093,7 @@ int ice_init_pf(struct ice_pf *pf)\n \t * the misc functionality and queue processing is combined in\n \t * the same vector and that gets setup at open.\n \t */\n+\tpf->ll_ts_irq.index = -ENOENT;\n \terr = ice_req_irq_msix_misc(pf);\n \tif (err) {\n \t\tdev_err(dev, \"setup of misc vector failed: %d\\n\", err);\n","prefixes":["iwl-net"]}