{"id":2227668,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2227668/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424043014.46305-20-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260424043014.46305-20-richard.henderson@linaro.org>","date":"2026-04-24T04:29:53","name":"[v2,19/40] fpu: Add scalbn argument to fp8 conversion routines","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a58b17f3f8af7428fd1dee689c6508cb48c90cd6","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260424043014.46305-20-richard.henderson@linaro.org/mbox/","series":[{"id":501300,"url":"http://patchwork.ozlabs.org/api/1.1/series/501300/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501300","date":"2026-04-24T04:29:37","name":"target/arm: Implement FEAT_FP8","version":2,"mbox":"http://patchwork.ozlabs.org/series/501300/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227668/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227668/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=DQ7liQu7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g20Rv5jS5z1yDD\n\tfor ; Fri, 24 Apr 2026 14:32:27 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wG8DC-0001Ay-3S; Fri, 24 Apr 2026 00:32:18 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wG8Cg-0007ng-9E\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 00:31:48 -0400","from mail-oa1-x29.google.com ([2001:4860:4864:20::29])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wG8Ce-0002w1-DO\n for qemu-devel@nongnu.org; Fri, 24 Apr 2026 00:31:46 -0400","by mail-oa1-x29.google.com with SMTP id\n 586e51a60fabf-4042905015cso4427075fac.0\n for ; Thu, 23 Apr 2026 21:31:43 -0700 (PDT)","from stoup.. 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","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"All Arm fp8 conversions have a power-of-2 scaling factor.\n\nSigned-off-by: Richard Henderson \n---\n include/fpu/softfloat.h | 16 ++++++++++------\n fpu/softfloat.c | 35 +++++++++++++++++++++--------------\n 2 files changed, 31 insertions(+), 20 deletions(-)","diff":"diff --git a/include/fpu/softfloat.h b/include/fpu/softfloat.h\nindex 8389a07b04..6f86848b7e 100644\n--- a/include/fpu/softfloat.h\n+++ b/include/fpu/softfloat.h\n@@ -195,13 +195,17 @@ float128 uint128_to_float128(Int128, float_status *status);\n \n float8_e4m3 float4_e2m1_to_float8_e4m3(float4_e2m1, float_status *status);\n \n-bfloat16 float8_e4m3_to_bfloat16(float8_e4m3, float_status *status);\n-float8_e4m3 bfloat16_to_float8_e4m3(bfloat16, bool sat, float_status *status);\n-float8_e4m3 float32_to_float8_e4m3(float32, bool sat, float_status *status);\n+bfloat16 float8_e4m3_to_bfloat16(float8_e4m3, int scale, float_status *status);\n+float8_e4m3 bfloat16_to_float8_e4m3(bfloat16, int scale,\n+ bool sat, float_status *status);\n+float8_e4m3 float32_to_float8_e4m3(float32, int scale,\n+ bool sat, float_status *status);\n \n-bfloat16 float8_e5m2_to_bfloat16(float8_e5m2, float_status *status);\n-float8_e5m2 bfloat16_to_float8_e5m2(bfloat16, bool sat, float_status *status);\n-float8_e5m2 float32_to_float8_e5m2(float32, bool sat, float_status *status);\n+bfloat16 float8_e5m2_to_bfloat16(float8_e5m2, int scale, float_status *status);\n+float8_e5m2 bfloat16_to_float8_e5m2(bfloat16, int scale,\n+ bool sat, float_status *status);\n+float8_e5m2 float32_to_float8_e5m2(float32, int scale,\n+ bool sat, float_status *status);\n \n /*----------------------------------------------------------------------------\n | Software half-precision conversion routines.\ndiff --git a/fpu/softfloat.c b/fpu/softfloat.c\nindex 91c34307c8..bcec7d38c8 100644\n--- a/fpu/softfloat.c\n+++ b/fpu/softfloat.c\n@@ -2853,7 +2853,8 @@ static void parts_float_to_ahp(FloatParts64 *a, float_status *s)\n }\n }\n \n-static void parts_float_to_e5m2(FloatParts64 *a, float_status *s, bool saturate)\n+static void parts_float_to_e5m2(FloatParts64 *a, float_status *s,\n+ int scale, bool saturate)\n {\n switch (a->cls) {\n case float_class_snan:\n@@ -2873,8 +2874,10 @@ static void parts_float_to_e5m2(FloatParts64 *a, float_status *s, bool saturate)\n \n case float_class_denormal:\n float_raise(float_flag_input_denormal_used, s);\n- break;\n+ /* fall through */\n case float_class_normal:\n+ a->exp += MIN(MAX(scale, -0x7f), 0x7f);\n+ break;\n case float_class_zero:\n break;\n default:\n@@ -2955,21 +2958,21 @@ float8_e4m3 float4_e2m1_to_float8_e4m3(float4_e2m1 a, float_status *s)\n return float8_e4m3_round_pack_canonical(&p, s, false);\n }\n \n-bfloat16 float8_e4m3_to_bfloat16(float8_e4m3 a, float_status *s)\n+bfloat16 float8_e4m3_to_bfloat16(float8_e4m3 a, int scale, float_status *s)\n {\n FloatParts64 p;\n \n float8_e4m3_unpack_canonical(&p, a, s);\n- parts_float_to_float(&p, s);\n+ parts_scalbn(&p, scale, s);\n return bfloat16_round_pack_canonical(&p, s);\n }\n \n-bfloat16 float8_e5m2_to_bfloat16(float8_e5m2 a, float_status *s)\n+bfloat16 float8_e5m2_to_bfloat16(float8_e5m2 a, int scale, float_status *s)\n {\n FloatParts64 p;\n \n float8_e5m2_unpack_canonical(&p, a, s);\n- parts_float_to_float(&p, s);\n+ parts_scalbn(&p, scale, s);\n return bfloat16_round_pack_canonical(&p, s);\n }\n \n@@ -2993,21 +2996,23 @@ float64 float16_to_float64(float16 a, bool ieee, float_status *s)\n return float64_round_pack_canonical(&p, s);\n }\n \n-float8_e4m3 float32_to_float8_e4m3(float32 a, bool saturate, float_status *s)\n+float8_e4m3 float32_to_float8_e4m3(float32 a, int scale,\n+ bool saturate, float_status *s)\n {\n FloatParts64 p;\n \n float32_unpack_canonical(&p, a, s);\n- parts_float_to_float(&p, s);\n+ parts_scalbn(&p, scale, s);\n return float8_e4m3_round_pack_canonical(&p, s, saturate);\n }\n \n-float8_e5m2 float32_to_float8_e5m2(float32 a, bool saturate, float_status *s)\n+float8_e5m2 float32_to_float8_e5m2(float32 a, int scale,\n+ bool saturate, float_status *s)\n {\n FloatParts64 p;\n \n float32_unpack_canonical(&p, a, s);\n- parts_float_to_e5m2(&p, s, saturate);\n+ parts_float_to_e5m2(&p, s, scale, saturate);\n return float8_e5m2_round_pack_canonical(&p, s, saturate);\n }\n \n@@ -3078,21 +3083,23 @@ float32 float64_to_float32(float64 a, float_status *s)\n return float32_round_pack_canonical(&p, s);\n }\n \n-float8_e4m3 bfloat16_to_float8_e4m3(bfloat16 a, bool saturate, float_status *s)\n+float8_e4m3 bfloat16_to_float8_e4m3(bfloat16 a, int scale,\n+ bool saturate, float_status *s)\n {\n FloatParts64 p;\n \n bfloat16_unpack_canonical(&p, a, s);\n- parts_float_to_float(&p, s);\n+ parts_scalbn(&p, scale, s);\n return float8_e4m3_round_pack_canonical(&p, s, saturate);\n }\n \n-float8_e5m2 bfloat16_to_float8_e5m2(bfloat16 a, bool saturate, float_status *s)\n+float8_e5m2 bfloat16_to_float8_e5m2(bfloat16 a, int scale,\n+ bool saturate, float_status *s)\n {\n FloatParts64 p;\n \n bfloat16_unpack_canonical(&p, a, s);\n- parts_float_to_e5m2(&p, s, saturate);\n+ parts_float_to_e5m2(&p, s, scale, saturate);\n return float8_e5m2_round_pack_canonical(&p, s, saturate);\n }\n \n","prefixes":["v2","19/40"]}