{"id":2227195,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2227195/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260423100229.2941820-33-peter.maydell@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260423100229.2941820-33-peter.maydell@linaro.org>","date":"2026-04-23T10:02:02","name":"[PULL,32/59] target/arm: Remove target_ulong use in hvf_handle_psci_call()","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"6c316f3abea828897db79125d111d8901c3446bb","submitter":{"id":5111,"url":"http://patchwork.ozlabs.org/api/1.1/people/5111/?format=json","name":"Peter Maydell","email":"peter.maydell@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260423100229.2941820-33-peter.maydell@linaro.org/mbox/","series":[{"id":501172,"url":"http://patchwork.ozlabs.org/api/1.1/series/501172/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501172","date":"2026-04-23T10:01:35","name":"[PULL,01/59] target/arm/tcg: increase cache level for cpu=max","version":1,"mbox":"http://patchwork.ozlabs.org/series/501172/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2227195/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2227195/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=ql6+abs6;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g1Wsy6PzQz1yD5\n\tfor ; Thu, 23 Apr 2026 20:04:54 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wFquS-0006w5-VM; Thu, 23 Apr 2026 06:03:49 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wFqtp-0006Tr-H6\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 06:03:10 -0400","from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wFqtn-0002BK-Uj\n for qemu-devel@nongnu.org; Thu, 23 Apr 2026 06:03:09 -0400","by mail-wm1-x32b.google.com with SMTP id\n 5b1f17b1804b1-4891e5b9c1fso44928405e9.2\n for ; Thu, 23 Apr 2026 03:03:07 -0700 (PDT)","from lanath.. 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32b;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32b.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Philippe Mathieu-Daudé \n\nSimilarly to commit 3580aa03547 (\"target/arm/tcg/psci.c: make\ncompilation unit common\") which replaced the target_ulong use in\narm_handle_psci_call(), replace the one in hvf_handle_psci_call.\n\nThis could be vaddr, because entry is the start pc for the on-lining\ncpu, but we prefer uint64_t because this is what we get in param[]\nand pass to arm_set_cpu_on().\n\nSigned-off-by: Philippe Mathieu-Daudé \nReviewed-by: Pierrick Bouvier \nReviewed-by: Richard Henderson \nMessage-id: 20260410194227.16357-1-philmd@linaro.org\nSigned-off-by: Peter Maydell \n---\n target/arm/hvf/hvf.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\nindex 5fc8f6bbbd..678afe5c8e 100644\n--- a/target/arm/hvf/hvf.c\n+++ b/target/arm/hvf/hvf.c\n@@ -1418,7 +1418,7 @@ static bool hvf_handle_psci_call(CPUState *cpu, int *excp_ret)\n bool target_aarch64 = true;\n CPUState *target_cpu_state;\n ARMCPU *target_cpu;\n- target_ulong entry;\n+ uint64_t entry;\n int target_el = 1;\n int32_t ret = 0;\n \n","prefixes":["PULL","32/59"]}