{"id":2226562,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2226562/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/77cc91a966bfcbeaad825b8be607dbd7a85dbbdb.1776872453.git.happycpu@gmail.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.1/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<77cc91a966bfcbeaad825b8be607dbd7a85dbbdb.1776872453.git.happycpu@gmail.com>","date":"2026-04-22T16:05:04","name":"[v1,2/2] gpio: 74x164: support 'registers-default' DT property for initial state","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"51c7c3c6e53c318f739c16397a5420a42b205cfb","submitter":{"id":93205,"url":"http://patchwork.ozlabs.org/api/1.1/people/93205/?format=json","name":"Chanhong Jung","email":"happycpu@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/77cc91a966bfcbeaad825b8be607dbd7a85dbbdb.1776872453.git.happycpu@gmail.com/mbox/","series":[{"id":501038,"url":"http://patchwork.ozlabs.org/api/1.1/series/501038/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501038","date":"2026-04-22T16:05:02","name":"gpio: 74x164: seed the chain from DT at probe time","version":1,"mbox":"http://patchwork.ozlabs.org/series/501038/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226562/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226562/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=U4rbNoMF;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35363-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"U4rbNoMF\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.210.178","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g146309Wjz1yCv\n\tfor ; Thu, 23 Apr 2026 02:13:47 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 640F130DBF81\n\tfor ; Wed, 22 Apr 2026 16:06:14 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5A29237F017;\n\tWed, 22 Apr 2026 16:05:19 +0000 (UTC)","from mail-pf1-f178.google.com (mail-pf1-f178.google.com\n [209.85.210.178])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 86EC438B157\n\tfor ; Wed, 22 Apr 2026 16:05:16 +0000 (UTC)","by mail-pf1-f178.google.com with SMTP id\n d2e1a72fcca58-82fcd0aa2dbso1052783b3a.0\n for ;\n Wed, 22 Apr 2026 09:05:16 -0700 (PDT)","from happycpu-p1.. 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Today the driver always kicks that first write\nfrom a zero-initialised buffer, so every output comes up low until user\nspace issues a write. Boards that rely on the chain to drive signals\nwhose power-on state matters (active-low indicators, reset lines, etc.)\nhave no way to express the desired initial pattern via DT, and must\nreinvent it from user space each time after probe.\n\nRead the new optional 'registers-default' u8 array into chip->buffer\nafter the buffer's size becomes known (so __counted_by() is satisfied)\nand before the first __gen_74x164_write_config(). Absence of the\nproperty keeps the current zeroing behaviour; an invalid size is\nrejected with dev_err_probe() so that dtbs_check violations surface\nloudly at probe time.\n\nThe matching binding change documents the property's layout. The\ncorresponding U-Boot driver (drivers/gpio/74x164_gpio.c) has honoured\nthe same property for years, so the two bootstages can now agree on\nthe initial state without user-space involvement.\n\nSigned-off-by: Chanhong Jung \n---\n drivers/gpio/gpio-74x164.c | 14 ++++++++++++++\n 1 file changed, 14 insertions(+)","diff":"diff --git a/drivers/gpio/gpio-74x164.c b/drivers/gpio/gpio-74x164.c\nindex c226524ef..b433a4a61 100644\n--- a/drivers/gpio/gpio-74x164.c\n+++ b/drivers/gpio/gpio-74x164.c\n@@ -134,6 +134,20 @@ static int gen_74x164_probe(struct spi_device *spi)\n \n \tchip->registers = nregs;\n \n+\t/*\n+\t * Optionally seed the chain with a board-specified pattern so that\n+\t * the outputs come up in a known state on the first SPI write. When\n+\t * the property is absent, the buffer stays zeroed by devm_kzalloc()\n+\t * and the existing behaviour is preserved.\n+\t */\n+\tif (device_property_present(dev, \"registers-default\")) {\n+\t\tret = device_property_read_u8_array(dev, \"registers-default\",\n+\t\t\t\t\t\t chip->buffer, nregs);\n+\t\tif (ret)\n+\t\t\treturn dev_err_probe(dev, ret,\n+\t\t\t\t\t \"Invalid 'registers-default'\\n\");\n+\t}\n+\n \tchip->gpiod_oe = devm_gpiod_get_optional(dev, \"enable\", GPIOD_OUT_LOW);\n \tif (IS_ERR(chip->gpiod_oe))\n \t\treturn PTR_ERR(chip->gpiod_oe);\n","prefixes":["v1","2/2"]}