{"id":2226517,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2226517/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260422143112.1329478-11-raymondmaoca@gmail.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260422143112.1329478-11-raymondmaoca@gmail.com>","date":"2026-04-22T14:31:06","name":"[10/16] dts: k1: add QSPI controller support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f52860a863424ce041831e2e5d1c57e502c64e1c","submitter":{"id":91989,"url":"http://patchwork.ozlabs.org/api/1.1/people/91989/?format=json","name":"Raymond Mao","email":"raymondmaoca@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260422143112.1329478-11-raymondmaoca@gmail.com/mbox/","series":[{"id":501020,"url":"http://patchwork.ozlabs.org/api/1.1/series/501020/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=501020","date":"2026-04-22T14:30:56","name":"Add PIN and SPI support for Spacemit K1","version":1,"mbox":"http://patchwork.ozlabs.org/series/501020/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226517/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226517/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 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trini@konsulko.com,\n lukma@denx.de, hs@nabladev.com, jh80.chung@samsung.com, peng.fan@nxp.com,\n xypron.glpk@gmx.de, randolph@andestech.com, dlan@gentoo.org,\n junhui.liu@pigmoral.tech, neil.armstrong@linaro.org,\n quentin.schulz@cherry.de, samuel@sholland.org, raymondmaoca@gmail.com","Subject":"[PATCH 10/16] dts: k1: add QSPI controller support","Date":"Wed, 22 Apr 2026 10:31:06 -0400","Message-Id":"<20260422143112.1329478-11-raymondmaoca@gmail.com>","X-Mailer":"git-send-email 2.25.1","In-Reply-To":"<20260422143112.1329478-1-raymondmaoca@gmail.com>","References":"<20260422143112.1329478-1-raymondmaoca@gmail.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: Raymond Mao \n\nAdd QSPI controller support in DTS for Spacemit K1 SoC.\n\nSigned-off-by: Raymond Mao \n---\n arch/riscv/dts/k1-spl.dts | 15 +++++++++++++++\n arch/riscv/dts/k1.dtsi | 16 ++++++++++++++++\n 2 files changed, 31 insertions(+)","diff":"diff --git a/arch/riscv/dts/k1-spl.dts b/arch/riscv/dts/k1-spl.dts\nindex 6f9407aada6..e3311af76e6 100644\n--- a/arch/riscv/dts/k1-spl.dts\n+++ b/arch/riscv/dts/k1-spl.dts\n@@ -226,3 +226,18 @@\n \t\t};\n \t};\n };\n+\n+&qspi {\n+\tstatus = \"okay\";\n+\tbootph-pre-ram;\n+\n+\tflash@0 {\n+\t\tcompatible = \"jedec,spi-nor\";\n+\t\treg = <0>;\n+\t\tspi-max-frequency = <26500000>;\n+\t\tm25p,fast-read;\n+\t\tbroken-flash-reset;\n+\t\tstatus = \"okay\";\n+\t\tbootph-pre-ram;\n+\t};\n+};\ndiff --git a/arch/riscv/dts/k1.dtsi b/arch/riscv/dts/k1.dtsi\nindex fc3a693a10e..96f604b0561 100644\n--- a/arch/riscv/dts/k1.dtsi\n+++ b/arch/riscv/dts/k1.dtsi\n@@ -879,6 +879,22 @@\n \t\t\t\tstatus = \"disabled\";\n \t\t\t};\n \n+\t\t\tqspi: spi@d420c000 {\n+\t\t\t\tcompatible = \"spacemit,k1-qspi\";\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\t\t\t\treg = <0x0 0xd420c000 0x0 0x1000>,\n+\t\t\t\t <0x0 0xb8000000 0x0 0xc00000>;\n+\t\t\t\treg-names = \"QuadSPI\", \"QuadSPI-memory\";\n+\t\t\t\tclocks = <&syscon_apmu CLK_QSPI_BUS>,\n+\t\t\t\t\t <&syscon_apmu CLK_QSPI>;\n+\t\t\t\tclock-names = \"qspi_en\", \"qspi\";\n+\t\t\t\tresets = <&syscon_apmu RESET_QSPI>,\n+\t\t\t\t\t <&syscon_apmu RESET_QSPI_BUS>;\n+\t\t\t\tinterrupts = <117>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n \t\t\tsec_uart1: serial@f0612000 {\n \t\t\t\tcompatible = \"spacemit,k1-uart\",\n \t\t\t\t\t \"intel,xscale-uart\";\n","prefixes":["10/16"]}