{"id":2226460,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2226460/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422125250.1303100-10-alex.bennee@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260422125250.1303100-10-alex.bennee@linaro.org>","date":"2026-04-22T12:52:26","name":"[v3,09/32] target/arm: migrate Granule Protection traps to registerfields","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"77041ea755dffc195936be51b771ebf61d6bc317","submitter":{"id":39532,"url":"http://patchwork.ozlabs.org/api/1.1/people/39532/?format=json","name":"Alex Bennée","email":"alex.bennee@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260422125250.1303100-10-alex.bennee@linaro.org/mbox/","series":[{"id":501008,"url":"http://patchwork.ozlabs.org/api/1.1/series/501008/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501008","date":"2026-04-22T12:52:20","name":"target/arm: fully model WFxT instructions for A-profile","version":3,"mbox":"http://patchwork.ozlabs.org/series/501008/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2226460/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2226460/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=nfTCAJXH;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::331;\n envelope-from=alex.bennee@linaro.org; helo=mail-wm1-x331.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Reviewed-by: Richard Henderson \nSigned-off-by: Alex Bennée \n---\n target/arm/syndrome.h | 30 +++++++++++++++++++++++++++---\n 1 file changed, 27 insertions(+), 3 deletions(-)","diff":"diff --git a/target/arm/syndrome.h b/target/arm/syndrome.h\nindex 6fcf0ac7572..bc65106c61a 100644\n--- a/target/arm/syndrome.h\n+++ b/target/arm/syndrome.h\n@@ -462,12 +462,36 @@ static inline uint32_t syn_bxjtrap(int cv, int cond, int rm)\n return res;\n }\n \n+/*\n+ * ISS encoding for a Granule Protection Check exception\n+ *\n+ * These are only reported to EL3\n+ */\n+FIELD(GPC_ISS, xFSC, 0, 6)\n+FIELD(GPC_ISS, WnR, 6, 1) /* Write not Read */\n+FIELD(GPC_ISS, S1PTW, 7, 1)\n+FIELD(GPC_ISS, CM, 8, 1)\n+FIELD(GPC_ISS, VNCR, 13, 1)\n+FIELD(GPC_ISS, GPCSC, 14, 6)\n+FIELD(GPC_ISS, InD, 20, 1) /* Instruction not Data access */\n+FIELD(GPC_ISS, S2PTW, 21, 1)\n+\n static inline uint32_t syn_gpc(int s2ptw, int ind, int gpcsc, int vncr,\n int cm, int s1ptw, int wnr, int fsc)\n {\n- return (EC_GPC << ARM_EL_EC_SHIFT) | ARM_EL_IL | (s2ptw << 21)\n- | (ind << 20) | (gpcsc << 14) | (vncr << 13) | (cm << 8)\n- | (s1ptw << 7) | (wnr << 6) | fsc;\n+ uint32_t res = syn_set_ec(0, EC_GPC);\n+ res = FIELD_DP32(res, SYNDROME, IL, 1);\n+\n+ res = FIELD_DP32(res, GPC_ISS, S2PTW, s2ptw);\n+ res = FIELD_DP32(res, GPC_ISS, InD, ind);\n+ res = FIELD_DP32(res, GPC_ISS, GPCSC, gpcsc);\n+ res = FIELD_DP32(res, GPC_ISS, VNCR, vncr);\n+ res = FIELD_DP32(res, GPC_ISS, CM, cm);\n+ res = FIELD_DP32(res, GPC_ISS, S1PTW, s1ptw);\n+ res = FIELD_DP32(res, GPC_ISS, WnR, wnr);\n+ res = FIELD_DP32(res, GPC_ISS, xFSC, fsc);\n+\n+ return res;\n }\n \n static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc)\n","prefixes":["v3","09/32"]}