{"id":2225774,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2225774/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260421-io_projection-v2-2-4c251c692ef4@garyguo.net/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260421-io_projection-v2-2-4c251c692ef4@garyguo.net>","date":"2026-04-21T14:56:13","name":"[v2,02/11] rust: io: generalize `Mmio` to arbitrary type","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1bf2dc57f8401d5b3c95a5ad9aed135318c470a3","submitter":{"id":76823,"url":"http://patchwork.ozlabs.org/api/1.1/people/76823/?format=json","name":"Gary Guo","email":"gary@garyguo.net"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260421-io_projection-v2-2-4c251c692ef4@garyguo.net/mbox/","series":[{"id":500833,"url":"http://patchwork.ozlabs.org/api/1.1/series/500833/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500833","date":"2026-04-21T14:56:19","name":"rust: I/O type generalization and projection","version":2,"mbox":"http://patchwork.ozlabs.org/series/500833/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2225774/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2225774/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=garyguo.net header.i=@garyguo.net header.a=rsa-sha256\n header.s=selector1 header.b=PdfOfMNU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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Wysocki\" , Danilo Krummrich ,\n Miguel Ojeda , Boqun Feng ,\n Gary Guo ,\n =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= ,\n Benno Lossin , Andreas Hindborg ,\n Alice Ryhl , Trevor Gross ,\n Daniel Almeida ,\n Bjorn Helgaas ,\n =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= ,\n Abdiel Janulgue ,\n Robin Murphy ,\n Alexandre Courbot , David Airlie ,\n Simona Vetter ","Cc":"driver-core@lists.linux.dev, rust-for-linux@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org,\n nouveau@lists.freedesktop.org, dri-devel@lists.freedesktop.org","X-Mailer":"b4 0.15.1","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1776783386; l=16534;\n i=gary@garyguo.net; s=20221204; h=from:subject:message-id;\n bh=faM0ZpteUlJaNJZMTjGbI7mkrrDCMYhjEeLbY0rM2bo=;\n b=81Koxp9RJC3hxba8mvXB9afBclGGtwdgEORR2NJq9fXTkJLb+ZFGPnT3+B6KfTXXlIvs4Bs+O\n PGABNSh/1QlDu2wVLUmPExo7yUiXX7d2AHyiU6B+NusmGMXfJ8fpF7f","X-Developer-Key":"i=gary@garyguo.net; a=ed25519;\n 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bac75a47-46e5-4887-4111-08de9fb62a5e","X-MS-Exchange-CrossTenant-AuthSource":"LOVP265MB8871.GBRP265.PROD.OUTLOOK.COM","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"21 Apr 2026 14:56:27.7791\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"bbc898ad-b10f-4e10-8552-d9377b823d45","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n wHUMn/98Q1GvCqu2kP+fUEvPgpahshFQlmq47oS/dN0LZIKclqrDs+bN8/YhtC5+9eGsfa9gPQCaquvcsSHbTQ==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CWLP265MB5523"},"content":"Currently, `io::Mmio` always represent an untyped region of a compile-time\nknown minimum size, which is roughly equivalent to `void __iomem*` (but\nwith bound checks). However, it is useful to also be to represent I/O\nmemory of a specific type, e.g. `u32 __iomem*` or `struct foo __iomem*`.\n\nThus, make `Mmio` generic on arbitrary `T`, where `T` is a sized type, or a\nDST that implements `KnownSize`. Similar to the `MmioRaw` change, the\nexisting behaviour is preserved in the form of `Mmio>`. This\nchange brings the MMIO closer to the DMA coherent allocation types that we\nhave, which is already typed.\n\nTo be able to implement `IoKnownSize`, add a `MIN_SIZE` constant to\n`KnownSize` trait to represent compile-time known minimum size of a\nspecific type.\n\nAcked-by: Miguel Ojeda \nSigned-off-by: Gary Guo \n---\n rust/kernel/devres.rs | 2 +-\n rust/kernel/io.rs | 63 +++++++++++++++++++++++++++-------------------\n rust/kernel/io/mem.rs | 4 +--\n rust/kernel/io/poll.rs | 6 +++--\n rust/kernel/io/register.rs | 19 ++++++++------\n rust/kernel/pci/io.rs | 2 +-\n rust/kernel/ptr.rs | 7 ++++++\n 7 files changed, 64 insertions(+), 39 deletions(-)","diff":"diff --git a/rust/kernel/devres.rs b/rust/kernel/devres.rs\nindex 65a4082122af..3e22c63efb98 100644\n--- a/rust/kernel/devres.rs\n+++ b/rust/kernel/devres.rs\n@@ -106,7 +106,7 @@ struct Inner {\n /// }\n ///\n /// impl Deref for IoMem {\n-/// type Target = Mmio;\n+/// type Target = Mmio>;\n ///\n /// fn deref(&self) -> &Self::Target {\n /// // SAFETY: The memory range stored in `self` has been properly mapped in `Self::new`.\ndiff --git a/rust/kernel/io.rs b/rust/kernel/io.rs\nindex d7f2145fa9b9..0b9c97c0a1d7 100644\n--- a/rust/kernel/io.rs\n+++ b/rust/kernel/io.rs\n@@ -44,6 +44,8 @@ pub struct Region {\n }\n \n impl KnownSize for Region {\n+ const MIN_SIZE: usize = SIZE;\n+\n #[inline(always)]\n fn size(p: *const Self) -> usize {\n (p as *const [u8]).len()\n@@ -169,7 +171,7 @@ pub fn size(&self) -> usize {\n /// }\n ///\n /// impl Deref for IoMem {\n-/// type Target = Mmio;\n+/// type Target = Mmio>;\n ///\n /// fn deref(&self) -> &Self::Target {\n /// // SAFETY: The memory range stored in `self` has been properly mapped in `Self::new`.\n@@ -187,7 +189,7 @@ pub fn size(&self) -> usize {\n /// # }\n /// ```\n #[repr(transparent)]\n-pub struct Mmio(MmioRaw>);\n+pub struct Mmio(MmioRaw);\n \n /// Checks whether an access of type `U` at the given `offset`\n /// is valid within this region.\n@@ -462,9 +464,10 @@ fn write64(&self, value: u64, offset: usize)\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n- /// fn do_reads(io: &Mmio) -> Result {\n+ /// fn do_reads(io: &Mmio) -> Result {\n /// // 32-bit read from address `0x10`.\n /// let v: u32 = io.try_read(0x10)?;\n ///\n@@ -496,9 +499,10 @@ fn try_read(&self, location: L) -> Result\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n- /// fn do_writes(io: &Mmio) -> Result {\n+ /// fn do_writes(io: &Mmio) -> Result {\n /// // 32-bit write of value `1` at address `0x10`.\n /// io.try_write(0x10, 1u32)?;\n ///\n@@ -534,6 +538,7 @@ fn try_write(&self, location: L, value: T) -> Result\n /// register,\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n /// register! {\n@@ -549,7 +554,7 @@ fn try_write(&self, location: L, value: T) -> Result\n /// }\n /// }\n ///\n- /// fn do_write_reg(io: &Mmio) -> Result {\n+ /// fn do_write_reg(io: &Mmio) -> Result {\n ///\n /// io.try_write_reg(VERSION::new(1, 0))\n /// }\n@@ -579,9 +584,10 @@ fn try_write_reg(&self, value: V) -> Result\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n- /// fn do_update(io: &Mmio<0x1000>) -> Result {\n+ /// fn do_update(io: &Mmio>) -> Result {\n /// io.try_update(0x10, |v: u32| {\n /// v + 1\n /// })\n@@ -616,9 +622,10 @@ fn try_update(&self, location: L, f: F) -> Result\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n- /// fn do_reads(io: &Mmio<0x1000>) {\n+ /// fn do_reads(io: &Mmio>) {\n /// // 32-bit read from address `0x10`.\n /// let v: u32 = io.read(0x10);\n ///\n@@ -648,9 +655,10 @@ fn read(&self, location: L) -> T\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n- /// fn do_writes(io: &Mmio<0x1000>) {\n+ /// fn do_writes(io: &Mmio>) {\n /// // 32-bit write of value `1` at address `0x10`.\n /// io.write(0x10, 1u32);\n ///\n@@ -682,6 +690,7 @@ fn write(&self, location: L, value: T)\n /// register,\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n /// register! {\n@@ -697,7 +706,7 @@ fn write(&self, location: L, value: T)\n /// }\n /// }\n ///\n- /// fn do_write_reg(io: &Mmio<0x1000>) {\n+ /// fn do_write_reg(io: &Mmio>) {\n /// io.write_reg(VERSION::new(1, 0));\n /// }\n /// ```\n@@ -726,9 +735,10 @@ fn write_reg(&self, value: V)\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+ /// Region,\n /// };\n ///\n- /// fn do_update(io: &Mmio<0x1000>) {\n+ /// fn do_update(io: &Mmio>) {\n /// io.update(0x10, |v: u32| {\n /// v + 1\n /// })\n@@ -778,7 +788,7 @@ fn io_addr_assert(&self, offset: usize) -> usize {\n macro_rules! impl_mmio_io_capable {\n ($mmio:ident, $(#[$attr:meta])* $ty:ty, $read_fn:ident, $write_fn:ident) => {\n $(#[$attr])*\n- impl IoCapable<$ty> for $mmio {\n+ impl IoCapable<$ty> for $mmio {\n unsafe fn io_read(&self, address: usize) -> $ty {\n // SAFETY: By the trait invariant `address` is a valid address for MMIO operations.\n unsafe { bindings::$read_fn(address as *const c_void) }\n@@ -805,7 +815,7 @@ unsafe fn io_write(&self, value: $ty, address: usize) {\n writeq\n );\n \n-impl Io for Mmio {\n+impl Io for Mmio {\n /// Returns the base address of this mapping.\n #[inline]\n fn addr(&self) -> usize {\n@@ -819,18 +829,18 @@ fn maxsize(&self) -> usize {\n }\n }\n \n-impl IoKnownSize for Mmio {\n- const MIN_SIZE: usize = SIZE;\n+impl IoKnownSize for Mmio {\n+ const MIN_SIZE: usize = T::MIN_SIZE;\n }\n \n-impl Mmio {\n+impl Mmio {\n /// Converts an `MmioRaw` into an `Mmio` instance, providing the accessors to the MMIO mapping.\n ///\n /// # Safety\n ///\n /// Callers must ensure that `addr` is the start of a valid I/O mapped memory region of size\n- /// `maxsize`.\n- pub unsafe fn from_raw(raw: &MmioRaw>) -> &Self {\n+ /// `addr.size()`.\n+ pub unsafe fn from_raw(raw: &MmioRaw) -> &Self {\n // SAFETY: `Mmio` is a transparent wrapper around `MmioRaw`.\n unsafe { &*core::ptr::from_ref(raw).cast() }\n }\n@@ -843,9 +853,9 @@ pub unsafe fn from_raw(raw: &MmioRaw>) -> &Self {\n ///\n /// See [`Mmio::relaxed`] for a usage example.\n #[repr(transparent)]\n-pub struct RelaxedMmio(Mmio);\n+pub struct RelaxedMmio(Mmio);\n \n-impl Io for RelaxedMmio {\n+impl Io for RelaxedMmio {\n #[inline]\n fn addr(&self) -> usize {\n self.0.addr()\n@@ -857,11 +867,11 @@ fn maxsize(&self) -> usize {\n }\n }\n \n-impl IoKnownSize for RelaxedMmio {\n- const MIN_SIZE: usize = SIZE;\n+impl IoKnownSize for RelaxedMmio {\n+ const MIN_SIZE: usize = T::MIN_SIZE;\n }\n \n-impl Mmio {\n+impl Mmio {\n /// Returns a [`RelaxedMmio`] reference that performs relaxed I/O operations.\n ///\n /// Relaxed accessors do not provide ordering guarantees with respect to DMA or memory accesses\n@@ -873,18 +883,19 @@ impl Mmio {\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+ /// Region,\n /// RelaxedMmio,\n /// };\n ///\n- /// fn do_io(io: &Mmio<0x100>) {\n+ /// fn do_io(io: &Mmio>) {\n /// // The access is performed using `readl_relaxed` instead of `readl`.\n /// let v = io.relaxed().read32(0x10);\n /// }\n ///\n /// ```\n- pub fn relaxed(&self) -> &RelaxedMmio {\n- // SAFETY: `RelaxedMmio` is `#[repr(transparent)]` over `Mmio`, so `Mmio` and\n- // `RelaxedMmio` have identical layout.\n+ pub fn relaxed(&self) -> &RelaxedMmio {\n+ // SAFETY: `RelaxedMmio` is `#[repr(transparent)]` over `Mmio`, so `Mmio` and\n+ // `RelaxedMmio` have identical layout.\n unsafe { core::mem::transmute(self) }\n }\n }\ndiff --git a/rust/kernel/io/mem.rs b/rust/kernel/io/mem.rs\nindex 9117d417f99c..a6292f4ebfa4 100644\n--- a/rust/kernel/io/mem.rs\n+++ b/rust/kernel/io/mem.rs\n@@ -214,7 +214,7 @@ pub fn new<'a>(io_request: IoRequest<'a>) -> impl PinInit, Error> +\n }\n \n impl Deref for ExclusiveIoMem {\n- type Target = Mmio;\n+ type Target = Mmio>;\n \n fn deref(&self) -> &Self::Target {\n &self.iomem\n@@ -289,7 +289,7 @@ fn drop(&mut self) {\n }\n \n impl Deref for IoMem {\n- type Target = Mmio;\n+ type Target = Mmio>;\n \n fn deref(&self) -> &Self::Target {\n // SAFETY: Safe as by the invariant of `IoMem`.\ndiff --git a/rust/kernel/io/poll.rs b/rust/kernel/io/poll.rs\nindex 75d1b3e8596c..2dce2b24b5ff 100644\n--- a/rust/kernel/io/poll.rs\n+++ b/rust/kernel/io/poll.rs\n@@ -48,13 +48,14 @@\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+/// Region,\n /// poll::read_poll_timeout, //\n /// };\n /// use kernel::time::Delta;\n ///\n /// const HW_READY: u16 = 0x01;\n ///\n-/// fn wait_for_hardware(io: &Mmio) -> Result {\n+/// fn wait_for_hardware(io: &Mmio>) -> Result {\n /// read_poll_timeout(\n /// // The `op` closure reads the value of a specific status register.\n /// || io.try_read16(0x1000),\n@@ -135,13 +136,14 @@ pub fn read_poll_timeout(\n /// use kernel::io::{\n /// Io,\n /// Mmio,\n+/// Region,\n /// poll::read_poll_timeout_atomic, //\n /// };\n /// use kernel::time::Delta;\n ///\n /// const HW_READY: u16 = 0x01;\n ///\n-/// fn wait_for_hardware(io: &Mmio) -> Result {\n+/// fn wait_for_hardware(io: &Mmio>) -> Result {\n /// read_poll_timeout_atomic(\n /// // The `op` closure reads the value of a specific status register.\n /// || io.try_read16(0x1000),\ndiff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs\nindex abc49926abfe..1a407fc35edc 100644\n--- a/rust/kernel/io/register.rs\n+++ b/rust/kernel/io/register.rs\n@@ -55,6 +55,7 @@\n //! register,\n //! Io,\n //! IoLoc,\n+//! Region,\n //! },\n //! num::Bounded,\n //! };\n@@ -66,7 +67,7 @@\n //! # 3:0 minor_revision;\n //! # }\n //! # }\n-//! # fn test(io: &Mmio<0x1000>) {\n+//! # fn test(io: &Mmio>) {\n //! # fn obtain_vendor_id() -> u8 { 0xff }\n //!\n //! // Read from the register's defined offset (0x100).\n@@ -441,6 +442,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// io::{\n /// register,\n /// Io,\n+/// Region,\n /// },\n /// };\n /// # use kernel::io::Mmio;\n@@ -452,7 +454,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// }\n /// }\n ///\n-/// # fn test(io: &Mmio<0x1000>) {\n+/// # fn test(io: &Mmio>) {\n /// let val = io.read(FIXED_REG);\n ///\n /// // Write from an already-existing value.\n@@ -554,6 +556,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// WithBase,\n /// },\n /// Io,\n+/// Region,\n /// },\n /// };\n /// # use kernel::io::Mmio;\n@@ -581,7 +584,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// }\n /// }\n ///\n-/// # fn test(io: Mmio<0x1000>) {\n+/// # fn test(io: Mmio>) {\n /// // Read the status of `Cpu0`.\n /// let cpu0_started = io.read(CPU_CTL::of::());\n ///\n@@ -598,7 +601,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// }\n /// }\n ///\n-/// # fn test2(io: Mmio<0x1000>) {\n+/// # fn test2(io: Mmio>) {\n /// // Start the aliased `CPU0`, leaving its other fields untouched.\n /// io.update(CPU_CTL_ALIAS::of::(), |r| r.with_alias_start(true));\n /// # }\n@@ -633,6 +636,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// register,\n /// register::Array,\n /// Io,\n+/// Region,\n /// },\n /// };\n /// # use kernel::io::Mmio;\n@@ -648,7 +652,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// }\n /// }\n ///\n-/// # fn test(io: &Mmio<0x1000>)\n+/// # fn test(io: &Mmio>)\n /// # -> Result<(), Error>{\n /// // Read scratch register 0, i.e. I/O address `0x80`.\n /// let scratch_0 = io.read(SCRATCH::at(0)).value();\n@@ -719,6 +723,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// WithBase,\n /// },\n /// Io,\n+/// Region,\n /// },\n /// };\n /// # use kernel::io::Mmio;\n@@ -749,7 +754,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// }\n /// }\n ///\n-/// # fn test(io: &Mmio<0x1000>) -> Result<(), Error> {\n+/// # fn test(io: &Mmio>) -> Result<(), Error> {\n /// // Read scratch register 0 of CPU0.\n /// let scratch = io.read(CPU_SCRATCH::of::().at(0));\n ///\n@@ -791,7 +796,7 @@ fn into_io_op(self) -> (FixedRegisterLoc, T) {\n /// }\n /// }\n ///\n-/// # fn test2(io: &Mmio<0x1000>) -> Result<(), Error> {\n+/// # fn test2(io: &Mmio>) -> Result<(), Error> {\n /// let cpu0_status = io.read(CPU_FIRMWARE_STATUS::of::()).status();\n /// # Ok(())\n /// # }\ndiff --git a/rust/kernel/pci/io.rs b/rust/kernel/pci/io.rs\nindex 0335b5068f69..e048370fb8c1 100644\n--- a/rust/kernel/pci/io.rs\n+++ b/rust/kernel/pci/io.rs\n@@ -238,7 +238,7 @@ fn drop(&mut self) {\n }\n \n impl Deref for Bar {\n- type Target = Mmio;\n+ type Target = Mmio>;\n \n fn deref(&self) -> &Self::Target {\n // SAFETY: By the type invariant of `Self`, the MMIO range in `self.io` is properly mapped.\ndiff --git a/rust/kernel/ptr.rs b/rust/kernel/ptr.rs\nindex 3f3e529e9f58..566e68f567a2 100644\n--- a/rust/kernel/ptr.rs\n+++ b/rust/kernel/ptr.rs\n@@ -235,11 +235,16 @@ fn align_up(self, alignment: Alignment) -> Option {\n ///\n /// This is a generalization of [`size_of`] that works for dynamically sized types.\n pub trait KnownSize {\n+ /// Minimum size of this type known at compile-time.\n+ const MIN_SIZE: usize;\n+\n /// Get the size of an object of this type in bytes, with the metadata of the given pointer.\n fn size(p: *const Self) -> usize;\n }\n \n impl KnownSize for T {\n+ const MIN_SIZE: usize = core::mem::size_of::();\n+\n #[inline(always)]\n fn size(_: *const Self) -> usize {\n size_of::()\n@@ -247,6 +252,8 @@ fn size(_: *const Self) -> usize {\n }\n \n impl KnownSize for [T] {\n+ const MIN_SIZE: usize = 0;\n+\n #[inline(always)]\n fn size(p: *const Self) -> usize {\n p.len() * size_of::()\n","prefixes":["v2","02/11"]}