{"id":2225099,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2225099/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420104248.86702-22-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260420104248.86702-22-mohamed@unpredictable.fr>","date":"2026-04-20T10:42:31","name":"[v2,21/38] target: i386: HLT type that ignores EFLAGS.IF","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"84702bb1fae36d14aa22e6e9ab321ac3e80fd624","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.1/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420104248.86702-22-mohamed@unpredictable.fr/mbox/","series":[{"id":500592,"url":"http://patchwork.ozlabs.org/api/1.1/series/500592/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500592","date":"2026-04-20T10:42:10","name":"WHPX x86 updates for QEMU 11.1","version":2,"mbox":"http://patchwork.ozlabs.org/series/500592/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2225099/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2225099/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=Y5lN968r;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fzj054z9Fz1yCv\n\tfor ; Mon, 20 Apr 2026 20:48:53 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wEm6a-0007K4-0x; Mon, 20 Apr 2026 06:43:52 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wEm6Y-0007Jc-Qk\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 06:43:50 -0400","from p-west3-cluster6-host3-snip4-10.eps.apple.com ([57.103.75.13]\n helo=outbound.ms.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wEm6X-0000fg-BB\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 06:43:50 -0400","from outbound.ms.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-1 (Postfix) with ESMTPS id\n 518AA18000BC; Mon, 20 Apr 2026 10:43:46 +0000 (UTC)","from localhost.localdomain (unknown [17.57.154.37])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-1 (Postfix) with ESMTPSA id\n B58E81800468; Mon, 20 Apr 2026 10:43:43 +0000 (UTC)"],"Dkim-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1776681828; x=1779273828;\n bh=tT4F++bSuONbY+c7bgtCCb6QKbPZ19v7x1ehrozqyHo=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=Y5lN968rPsdG4YhoFc9+bJeWXAP8pirP8325pvD6E3skje7SoyXLlzonmF2+I4HKDy5LkcM/CBQWHtPJleSYdLKYrz7S/spuZnZL/arNSc3NKA4CCdxGTn5UB9usHrBJ22IHqbrCdfuD6H6VHBJamaByR/Z74cD9xVI6MaDZarnrY/PdfGlmgywJqa9UhYWYQR0ltJsxuLIwA7DQyb1mEz54O6PcN+7droBlp0lgeFbZ2QF/97JavT5ID+NdD5hheGrJ3/c+69RMPuYkkDm7qLQHiAodEXFCW+uCIlhrGGoDCvKaWRs47W/0lzRcu/GKqqLqlaU1o7a2aIowDzEVvg==","mail-alias-created-date":"1752046281608","From":"Mohamed Mediouni ","To":"qemu-devel@nongnu.org","Cc":"qemu-arm@nongnu.org, Mohamed Mediouni ,\n Paolo Bonzini ,\n Phil Dennis-Jordan ,\n Roman Bolshakov ,\n Pierrick Bouvier ,\n Pedro Barbuda , Wei Liu ,\n \"Michael S. Tsirkin\" ,\n Peter Maydell , Zhao Liu ","Subject":"[PATCH v2 21/38] target: i386: HLT type that ignores EFLAGS.IF","Date":"Mon, 20 Apr 2026 12:42:31 +0200","Message-ID":"<20260420104248.86702-22-mohamed@unpredictable.fr>","X-Mailer":"git-send-email 2.50.1","In-Reply-To":"<20260420104248.86702-1-mohamed@unpredictable.fr>","References":"<20260420104248.86702-1-mohamed@unpredictable.fr>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Proofpoint-ORIG-GUID":"BUSIVBVpXyOejyGnf0nikFQ2625_67KS","X-Authority-Info-Out":"v=2.4 cv=DICCIiNb c=1 sm=1 tr=0 ts=69e60362\n cx=c_apl:c_pps:t_out a=qkKslKyYc0ctBTeLUVfTFg==:117 a=A5OVakUREuEA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=ZtXhj7NgbhMgH__AbsQA:9","X-Proofpoint-GUID":"BUSIVBVpXyOejyGnf0nikFQ2625_67KS","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDIwMDEwNCBTYWx0ZWRfX2YcaoG8wkDlD\n pOJ2Wkw596+tBK9FsCKZXoMkU2AvQzfbgS3yYWv1l9yOpvRAE93K7Cg5+umt0Hry3lD9k037Fkx\n d0C2VTtAVES2d1mWodbBP+5CbgPjn8ogRoy88fZI0Xu9CXJiZ9y5NQAyJ1AYHaOINaNOaCKssLn\n 8q1nKVgt80RF8t3y16kbraDF/mIYur+KsAu9BceUuN2kYlVyIWtwR6iSlCO/hvwHNIp99zpSt47\n Dj5O9ugHNtE7aZ41HVc0SFjfhWStyDhn0LgPzPGs95pz0UU8fxAW9Ksj1aqFg3/tbMlH0rPl57V\n 9y7IWzDp8MyhtcZKjkDMyiqE6QJcS6KFGbQQXXdD/Y4YKIcO5WSztpn2RyxLy4=","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-20_02,2026-04-17_04,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=notspam policy=default score=0 bulkscore=0\n spamscore=0 malwarescore=0 mlxlogscore=958 phishscore=0 adultscore=0\n lowpriorityscore=0 clxscore=1030 suspectscore=0 mlxscore=0 classifier=spam\n authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2604200104","Received-SPF":"pass client-ip=57.103.75.13;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.ms.icloud.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"The TLFS says:\n\n> A partition which possesses the AccessGuestIdleMsr privilege may trigger\n> entry into the virtual processor idle sleep state through a read to the\n> hypervisor-defined MSR HV_X64_MSR_GUEST_IDLE. The virtual processor will\n> be woken when an interrupt arrives, regardless of whether the interrupt\n> is enabled on the virtual processor or not.\n\nMeanwhile, Windows 24H2+ calls this MSR anyway without the privilege being set.\n\nAdd the infrastructure to support it on the generic QEMU side.\n\nSigned-off-by: Mohamed Mediouni \n---\n target/i386/cpu.c | 10 ++++++----\n target/i386/cpu.h | 2 ++\n 2 files changed, 8 insertions(+), 4 deletions(-)","diff":"diff --git a/target/i386/cpu.c b/target/i386/cpu.c\nindex 0000093fa3..b18e40666e 100644\n--- a/target/i386/cpu.c\n+++ b/target/i386/cpu.c\n@@ -10482,13 +10482,15 @@ int x86_cpu_pending_interrupt(CPUState *cs, int interrupt_request)\n (((env->hflags2 & HF2_VINTR_MASK) &&\n (env->hflags2 & HF2_HIF_MASK)) ||\n (!(env->hflags2 & HF2_VINTR_MASK) &&\n- (env->eflags & IF_MASK &&\n- !(env->hflags & HF_INHIBIT_IRQ_MASK))))) {\n+ ((env->eflags & IF_MASK &&\n+ !(env->hflags & HF_INHIBIT_IRQ_MASK))\n+ || env->hflags2 & HF2_HYPERV_HLT_MASK)))) {\n return CPU_INTERRUPT_HARD;\n } else if (env->hflags2 & HF2_VGIF_MASK) {\n if((interrupt_request & CPU_INTERRUPT_VIRQ) &&\n- (env->eflags & IF_MASK) &&\n- !(env->hflags & HF_INHIBIT_IRQ_MASK)) {\n+ ((env->eflags & IF_MASK &&\n+ !(env->hflags & HF_INHIBIT_IRQ_MASK))\n+ || env->hflags2 & HF2_HYPERV_HLT_MASK)) {\n return CPU_INTERRUPT_VIRQ;\n }\n }\ndiff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 0b539155c4..67f508dc10 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -225,6 +225,7 @@ typedef enum X86Seg {\n #define HF2_NPT_SHIFT 6 /* Nested Paging enabled */\n #define HF2_IGNNE_SHIFT 7 /* Ignore CR0.NE=0 */\n #define HF2_VGIF_SHIFT 8 /* Can take VIRQ*/\n+#define HF2_HYPERV_HLT_SHIFT 9 /* Hyper-V HV_X64_MSR_GUEST_IDLE */\n \n #define HF2_GIF_MASK (1 << HF2_GIF_SHIFT)\n #define HF2_HIF_MASK (1 << HF2_HIF_SHIFT)\n@@ -235,6 +236,7 @@ typedef enum X86Seg {\n #define HF2_NPT_MASK (1 << HF2_NPT_SHIFT)\n #define HF2_IGNNE_MASK (1 << HF2_IGNNE_SHIFT)\n #define HF2_VGIF_MASK (1 << HF2_VGIF_SHIFT)\n+#define HF2_HYPERV_HLT_MASK (1 << HF2_HYPERV_HLT_SHIFT)\n \n #define CR0_PE_SHIFT 0\n #define CR0_MP_SHIFT 1\n","prefixes":["v2","21/38"]}