{"id":2225082,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2225082/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420104248.86702-36-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260420104248.86702-36-mohamed@unpredictable.fr>","date":"2026-04-20T10:42:45","name":"[v2,35/38] target/i386: emulate, hvf: rdmsr/wrmsr GPF handling","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6a49a4c2e13f9560e327963a5531411212882122","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.1/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260420104248.86702-36-mohamed@unpredictable.fr/mbox/","series":[{"id":500592,"url":"http://patchwork.ozlabs.org/api/1.1/series/500592/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500592","date":"2026-04-20T10:42:10","name":"WHPX x86 updates for QEMU 11.1","version":2,"mbox":"http://patchwork.ozlabs.org/series/500592/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2225082/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2225082/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=Y4APNMHI;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fzhy54rfzz1yCv\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 20 Apr 2026 20:47:09 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wEm78-0008Sf-Hw; Mon, 20 Apr 2026 06:44:26 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wEm77-0008Rx-LO\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 06:44:25 -0400","from p-west3-cluster4-host2-snip4-10.eps.apple.com ([57.103.74.191]\n helo=outbound.ms.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wEm76-0000o2-1Y\n for qemu-devel@nongnu.org; Mon, 20 Apr 2026 06:44:25 -0400","from outbound.ms.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-1 (Postfix) with ESMTPS id\n 1481418000A8; Mon, 20 Apr 2026 10:44:20 +0000 (UTC)","from localhost.localdomain (unknown [17.57.154.37])\n by p00-icloudmta-asmtp-us-west-3a-100-percent-1 (Postfix) with ESMTPSA id\n 7AA7E1800097; Mon, 20 Apr 2026 10:44:18 +0000 (UTC)"],"Dkim-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1776681863; x=1779273863;\n bh=IdjugA9xaHsg2nQQQ2yDxOQbJO+pfnS1V2J1m3byuQQ=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=Y4APNMHI8lrLheuTzlQECpUx0gB1wYDEygpQ9sQX7gRHR/lsXp3RzIK1l+DxWBKxDPEwu29O8Zfna0T6pxW2Jv1W/74S5ltzXNwi57PI2NKrDVEE3TqlMGRZM+M2xWW0uJScuhQqATPSTPT5a7/TFq6adHcdSdd86zoGsfRU9ng8w8YjKvYIegyeT4U6PO0q1OJFeW+BkpMTcjIy4DTnhaZPUzi3QsDFyzQ0jAkjsdnxZutD1QP44vuOf/4cz28iUzeoD4qqAEpJa1UrTcVVTr7HnteefAqm/lNrx550sJT3zD524g4OowlYmxT2XrwSoKz14udaqiUfOEjvLuCYDQ==","mail-alias-created-date":"1752046281608","From":"Mohamed Mediouni <mohamed@unpredictable.fr>","To":"qemu-devel@nongnu.org","Cc":"qemu-arm@nongnu.org, Mohamed Mediouni <mohamed@unpredictable.fr>,\n Paolo Bonzini <pbonzini@redhat.com>,\n Phil Dennis-Jordan <phil@philjordan.eu>,\n Roman Bolshakov <rbolshakov@ddn.com>,\n Pierrick Bouvier <pierrick.bouvier@linaro.org>,\n Pedro Barbuda <pbarbuda@microsoft.com>, Wei Liu <wei.liu@kernel.org>,\n \"Michael S. Tsirkin\" <mst@redhat.com>,\n Peter Maydell <peter.maydell@linaro.org>, Zhao Liu <zhao1.liu@intel.com>","Subject":"[PATCH v2 35/38] target/i386: emulate, hvf: rdmsr/wrmsr GPF handling","Date":"Mon, 20 Apr 2026 12:42:45 +0200","Message-ID":"<20260420104248.86702-36-mohamed@unpredictable.fr>","X-Mailer":"git-send-email 2.50.1","In-Reply-To":"<20260420104248.86702-1-mohamed@unpredictable.fr>","References":"<20260420104248.86702-1-mohamed@unpredictable.fr>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Proofpoint-ORIG-GUID":"4dx0tQky0FyRJ8etG-ROFUMLSj2qtuUc","X-Proofpoint-GUID":"4dx0tQky0FyRJ8etG-ROFUMLSj2qtuUc","X-Authority-Info-Out":"v=2.4 cv=d7D4CBjE c=1 sm=1 tr=0 ts=69e60385\n cx=c_apl:c_pps:t_out a=qkKslKyYc0ctBTeLUVfTFg==:117 a=A5OVakUREuEA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=183X19KWV2qSZiVN73EA:9","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDIwMDEwNCBTYWx0ZWRfX5moUkBXcARtm\n iUyAwV7jxo0KKe1iO+NnUujp3m65SxV8r/J7qYBJAuM2pTqOdrkEDhWF/sonW0Al/Rl2rwhhipC\n sI4nDTZHdA1PWz99R6t7aLsPgdnAAQWZPJEw7WL1JtX4vr64+fk7qv59WaESRLMYjlnnIBrtMdn\n mawfWoFp7jBy7k1hjnepKFmpVWpvAIlAhzWywjbpgwJ0V9QasBl/EjltqRP3SFqPw1EjUC+IQdZ\n 38oOQ42uah3IKF3+gEudw0efqHh8UqBhfBwCjxB7rQzpsudLKzBcAJQHi9kgUoVEkacQAzOTGv3\n kzYnCd/lvxkNWtEDC3BDcV/K/Er+XJdc9nTjwZBNQ4mADUTub7HRftKoPYqVnM=","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-20_02,2026-04-17_04,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=notspam policy=default score=0 phishscore=0\n malwarescore=0 bulkscore=0 lowpriorityscore=0 spamscore=0 mlxlogscore=697\n adultscore=0 clxscore=1030 suspectscore=0 mlxscore=0 classifier=spam\n authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2604200104","Received-SPF":"pass client-ip=57.103.74.191;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.ms.icloud.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development <qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"In that case, the instruction pointer mustn't be incremented.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/i386/emulate/x86_emu.c | 10 ++++++----\n target/i386/emulate/x86_emu.h |  4 ++--\n target/i386/hvf/hvf.c         |  9 +++++++--\n 3 files changed, 15 insertions(+), 8 deletions(-)","diff":"diff --git a/target/i386/emulate/x86_emu.c b/target/i386/emulate/x86_emu.c\nindex c2da1a133f..c6ea854290 100644\n--- a/target/i386/emulate/x86_emu.c\n+++ b/target/i386/emulate/x86_emu.c\n@@ -792,15 +792,17 @@ void x86_emul_raise_exception(CPUX86State *env, int exception_index, int error_c\n \n static bool exec_rdmsr(CPUX86State *env, struct x86_decode *decode)\n {\n-    emul_ops->simulate_rdmsr(env_cpu(env));\n-    env->eip += decode->len;\n+    if (!emul_ops->simulate_rdmsr(env_cpu(env))) {\n+        env->eip += decode->len;\n+    }\n     return 0;\n }\n \n static bool exec_wrmsr(CPUX86State *env, struct x86_decode *decode)\n {\n-    emul_ops->simulate_wrmsr(env_cpu(env));\n-    env->eip += decode->len;\n+    if (!emul_ops->simulate_wrmsr(env_cpu(env))) {\n+        env->eip += decode->len;\n+    }\n     return 0;\n }\n \ndiff --git a/target/i386/emulate/x86_emu.h b/target/i386/emulate/x86_emu.h\nindex a8d4c93098..b985240b90 100644\n--- a/target/i386/emulate/x86_emu.h\n+++ b/target/i386/emulate/x86_emu.h\n@@ -31,8 +31,8 @@ struct x86_emul_ops {\n     target_ulong (*read_cr) (CPUState *cpu, int cr);\n     void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direction,\n                       int size, int count);\n-    void (*simulate_rdmsr)(CPUState *cs);\n-    void (*simulate_wrmsr)(CPUState *cs);\n+    bool (*simulate_rdmsr)(CPUState *cs);\n+    bool (*simulate_wrmsr)(CPUState *cs);\n     bool (*is_protected_mode)(CPUState *cpu);\n     bool (*is_long_mode)(CPUState *cpu);\n     bool (*is_user_mode)(CPUState *cpu);\ndiff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c\nindex c0d028b147..dfe7500010 100644\n--- a/target/i386/hvf/hvf.c\n+++ b/target/i386/hvf/hvf.c\n@@ -536,7 +536,7 @@ void hvf_store_regs(CPUState *cs)\n     macvm_set_rip(cs, env->eip);\n }\n \n-void hvf_simulate_rdmsr(CPUState *cs)\n+bool hvf_simulate_rdmsr(CPUState *cs)\n {\n     X86CPU *cpu = X86_CPU(cs);\n     CPUX86State *env = &cpu->env;\n@@ -557,6 +557,7 @@ void hvf_simulate_rdmsr(CPUState *cs)\n         ret = apic_msr_read(cpu->apic_state, index, &val);\n         if (ret < 0) {\n             x86_emul_raise_exception(env, EXCP0D_GPF, 0);\n+            return 1;\n         }\n \n         break;\n@@ -639,9 +640,10 @@ void hvf_simulate_rdmsr(CPUState *cs)\n \n     RAX(env) = (uint32_t)val;\n     RDX(env) = (uint32_t)(val >> 32);\n+    return 0;\n }\n \n-void hvf_simulate_wrmsr(CPUState *cs)\n+bool hvf_simulate_wrmsr(CPUState *cs)\n {\n     X86CPU *cpu = X86_CPU(cs);\n     CPUX86State *env = &cpu->env;\n@@ -657,6 +659,7 @@ void hvf_simulate_wrmsr(CPUState *cs)\n         r = cpu_set_apic_base(cpu->apic_state, data);\n         if (r < 0) {\n             x86_emul_raise_exception(env, EXCP0D_GPF, 0);\n+            return 1;\n         }\n \n         break;\n@@ -668,6 +671,7 @@ void hvf_simulate_wrmsr(CPUState *cs)\n         ret = apic_msr_write(cpu->apic_state, index, data);\n         if (ret < 0) {\n             x86_emul_raise_exception(env, EXCP0D_GPF, 0);\n+            return 1;\n         }\n \n         break;\n@@ -746,6 +750,7 @@ void hvf_simulate_wrmsr(CPUState *cs)\n          g_hypervisor_iface->wrmsr_handler(cs, msr, data);\n \n     printf(\"write msr %llx\\n\", RCX(cs));*/\n+    return 0;\n }\n \n static int hvf_handle_vmexit(CPUState *cpu)\n","prefixes":["v2","35/38"]}