{"id":2223844,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2223844/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260416092105.41439-4-fengchengwen@huawei.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260416092105.41439-4-fengchengwen@huawei.com>","date":"2026-04-16T09:21:03","name":"[v2,3/5] vfio/pci: Add PCIe TPH enable/disable support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"86ef9ab6f4af56ea96fac31d5c18d9c906bb15dd","submitter":{"id":92756,"url":"http://patchwork.ozlabs.org/api/1.1/people/92756/?format=json","name":"Chengwen Feng","email":"fengchengwen@huawei.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260416092105.41439-4-fengchengwen@huawei.com/mbox/","series":[{"id":500123,"url":"http://patchwork.ozlabs.org/api/1.1/series/500123/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=500123","date":"2026-04-16T09:21:03","name":"vfio/pci: Add PCIe TPH support","version":2,"mbox":"http://patchwork.ozlabs.org/series/500123/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223844/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223844/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=huawei.com header.i=@huawei.com header.a=rsa-sha256\n header.s=dkim header.b=qYhdb+kc;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; 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a=rsa-sha256; d=huawei.com; s=dkim;\n\tc=relaxed/relaxed; q=dns/txt;\n\th=From;\n\tbh=Vm6GVTHIjg7srtzmpwKRJWxW+mbYdqCyts7eyl/ruek=;\n\tb=qYhdb+kcJczbWaGsLeFOtykT+gMGaRbGygNdtXDrnboXqihEtNDfSzV43nDgpp2Nsoe4WuF6W\n\tvK2rP4HwYDZphx1Gc3yrMEw7dVSj2bnwpqO9yFwn7X3e7sEHp3LV2h0S2VTCoN1OqQBhAwqTi5x\n\tD9pEt/VLPJYO7mpGysztt0I=","From":"Chengwen Feng ","To":", ","CC":", ,\n\t, , ,\n\t","Subject":"[PATCH v2 3/5] vfio/pci: Add PCIe TPH enable/disable support","Date":"Thu, 16 Apr 2026 17:21:03 +0800","Message-ID":"<20260416092105.41439-4-fengchengwen@huawei.com>","X-Mailer":"git-send-email 2.17.1","In-Reply-To":"<20260416092105.41439-1-fengchengwen@huawei.com>","References":"<20260416092105.41439-1-fengchengwen@huawei.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain","X-ClientProxiedBy":"kwepems200002.china.huawei.com (7.221.188.68) To\n kwepemk500009.china.huawei.com (7.202.194.94)"},"content":"Add support to enable and disable TPH function with\nmode selection.\n\nSigned-off-by: Chengwen Feng \n---\n drivers/vfio/pci/vfio_pci_core.c | 36 ++++++++++++++++++++++++++++++++\n 1 file changed, 36 insertions(+)","diff":"diff --git a/drivers/vfio/pci/vfio_pci_core.c b/drivers/vfio/pci/vfio_pci_core.c\nindex fc82ab845737..22c16662f533 100644\n--- a/drivers/vfio/pci/vfio_pci_core.c\n+++ b/drivers/vfio/pci/vfio_pci_core.c\n@@ -1487,6 +1487,38 @@ static int vfio_pci_tph_get_cap(struct vfio_pci_core_device *vdev,\n \treturn 0;\n }\n \n+static int vfio_pci_tph_enable(struct vfio_pci_core_device *vdev,\n+\t\t\t struct vfio_device_pci_tph_op *op,\n+\t\t\t void __user *uarg)\n+{\n+\tstruct vfio_pci_tph_ctrl ctrl;\n+\tint mode;\n+\n+\tif (op->argsz < offsetofend(struct vfio_device_pci_tph_op, ctrl))\n+\t\treturn -EINVAL;\n+\n+\tif (copy_from_user(&ctrl, uarg, sizeof(ctrl)))\n+\t\treturn -EFAULT;\n+\n+\tif (ctrl.mode != VFIO_PCI_TPH_MODE_IV &&\n+\t ctrl.mode != VFIO_PCI_TPH_MODE_DS)\n+\t\treturn -EINVAL;\n+\n+\t/* Reserved must be zero */\n+\tif (memchr_inv(ctrl.reserved, 0, sizeof(ctrl.reserved)))\n+\t\treturn -EINVAL;\n+\n+\tmode = (ctrl.mode == VFIO_PCI_TPH_MODE_IV) ? PCI_TPH_ST_IV_MODE :\n+\t\t\t\t\t\t PCI_TPH_ST_DS_MODE;\n+\treturn pcie_enable_tph(vdev->pdev, mode);\n+}\n+\n+static int vfio_pci_tph_disable(struct vfio_pci_core_device *vdev)\n+{\n+\tpcie_disable_tph(vdev->pdev);\n+\treturn 0;\n+}\n+\n static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \t\t\t void __user *uarg)\n {\n@@ -1503,6 +1535,10 @@ static int vfio_pci_ioctl_tph(struct vfio_pci_core_device *vdev,\n \tswitch (op.op) {\n \tcase VFIO_PCI_TPH_GET_CAP:\n \t\treturn vfio_pci_tph_get_cap(vdev, &op, uarg + minsz);\n+\tcase VFIO_PCI_TPH_ENABLE:\n+\t\treturn vfio_pci_tph_enable(vdev, &op, uarg + minsz);\n+\tcase VFIO_PCI_TPH_DISABLE:\n+\t\treturn vfio_pci_tph_disable(vdev);\n \tdefault:\n \t\t/* Other ops are not implemented yet */\n \t\treturn -EINVAL;\n","prefixes":["v2","3/5"]}