{"id":2223670,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2223670/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415233740.3027321-5-alistair.francis@wdc.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260415233740.3027321-5-alistair.francis@wdc.com>","date":"2026-04-15T23:37:40","name":"[v2,4/4] target/riscv: Use ELEN for Fractional LMUL check","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e9a08c36f8d274d2b0e2bde3956d3928d8bd3926","submitter":{"id":64571,"url":"http://patchwork.ozlabs.org/api/1.1/people/64571/?format=json","name":"Alistair Francis","email":"alistair23@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260415233740.3027321-5-alistair.francis@wdc.com/mbox/","series":[{"id":500054,"url":"http://patchwork.ozlabs.org/api/1.1/series/500054/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=500054","date":"2026-04-15T23:37:38","name":"target/riscv: A collection of bug fixes","version":2,"mbox":"http://patchwork.ozlabs.org/series/500054/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223670/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223670/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=Ak/3EG3E;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pl1-x632.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Alistair Francis \n\nThe RISC-V spec states that\n\n\"\"\"\nFor a given supported fractional LMUL setting, implementations\nmust support SEW settings between SEWMIN and LMUL * ELEN, inclusive.\n\"\"\"\n\nWe were previously checking VLEN, instead of ELEN, so let's update to\ncheck ELEN instead of VLEN for fractional scaling.\n\nCc: qemu-stable@nongnu.org\nResolves: https://gitlab.com/qemu-project/qemu/-/work_items/3196\nSigned-off-by: Alistair Francis \nReviewed-by: Daniel Henrique Barboza \nReviewed-by: LIU Zhiwei \nReviewed-by: Chao Liu \n---\n target/riscv/vector_helper.c | 9 ++++-----\n 1 file changed, 4 insertions(+), 5 deletions(-)","diff":"diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c\nindex 83dd26314d..b4fc791eb7 100644\n--- a/target/riscv/vector_helper.c\n+++ b/target/riscv/vector_helper.c\n@@ -47,18 +47,17 @@ target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1,\n target_ulong reserved = s2 &\n MAKE_64BIT_MASK(R_VTYPE_RESERVED_SHIFT,\n xlen - 1 - R_VTYPE_RESERVED_SHIFT);\n- uint16_t vlen = cpu->cfg.vlenb << 3;\n int8_t lmul;\n \n if (vlmul & 4) {\n /*\n * Fractional LMUL, check:\n *\n- * VLEN * LMUL >= SEW\n- * VLEN >> (8 - lmul) >= sew\n- * (vlenb << 3) >> (8 - lmul) >= sew\n+ * ELEN * LMUL >= SEW\n+ * ELEN >> (8 - vlmul) >= sew\n */\n- if (vlmul == 4 || (vlen >> (8 - vlmul)) < sew) {\n+ if (vlmul == 4 ||\n+ (cpu->cfg.elen >> (8 - vlmul)) < sew) {\n vill = true;\n }\n }\n","prefixes":["v2","4/4"]}