{"id":2223110,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2223110/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414132100.53861-3-philmd@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260414132100.53861-3-philmd@linaro.org>","date":"2026-04-14T13:20:58","name":"[PULL,2/3] hw: q35: fix VGA text console with SMM disabled","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"94c0c5ca347385d2cb52657189c492ef5abd39a2","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.1/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260414132100.53861-3-philmd@linaro.org/mbox/","series":[{"id":499841,"url":"http://patchwork.ozlabs.org/api/1.1/series/499841/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499841","date":"2026-04-14T13:20:57","name":"[PULL,1/3] hw/ppc/e500: fix bus-frequency property hardcoded to zero in CPU FDT node","version":1,"mbox":"http://patchwork.ozlabs.org/series/499841/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223110/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223110/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=mWTBhqiL;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::42a;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x42a.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Mohamed Mediouni \n\nWork around black screen in VGA mode with SMM disabled.\n\nRequired by NVMM, HVF and WHPX backends.\n\nhttps://gnats.NetBSD.org/59721\nhttps://gitlab.com/qemu-project/qemu/-/issues/2608\nhttps://gitlab.com/qemu-project/qemu/-/work_items/3085\n\nPatch written by Taylor R Campbell \n\nSigned-off-by: Mohamed Mediouni \nSigned-off-by: Michael Tokarev \nReviewed-by: Philippe Mathieu-Daudé \nMessage-ID: <20260413170407.57574-1-mohamed@unpredictable.fr>\nSigned-off-by: Philippe Mathieu-Daudé \n---\n hw/pci-host/q35.c | 22 +++++++++++++---------\n 1 file changed, 13 insertions(+), 9 deletions(-)","diff":"diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c\nindex e85e4227b37..05ef5222f7a 100644\n--- a/hw/pci-host/q35.c\n+++ b/hw/pci-host/q35.c\n@@ -372,6 +372,10 @@ static void mch_update_smram(MCHPCIState *mch)\n memory_region_set_enabled(&mch->high_smram, false);\n }\n \n+ if (!mch->has_smm_ranges) {\n+ goto out;\n+ }\n+\n if ((pd->config[MCH_HOST_BRIDGE_ESMRAMC] & MCH_HOST_BRIDGE_ESMRAMC_T_EN) &&\n (pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_G_SMRAME)) {\n switch (pd->config[MCH_HOST_BRIDGE_ESMRAMC] &\n@@ -405,7 +409,7 @@ static void mch_update_smram(MCHPCIState *mch)\n mch->below_4g_mem_size - tseg_size);\n memory_region_set_alias_offset(&mch->tseg_window,\n mch->below_4g_mem_size - tseg_size);\n-\n+out:\n memory_region_transaction_commit();\n }\n \n@@ -474,15 +478,15 @@ static void mch_write_config(PCIDevice *d,\n mch_update_pciexbar(mch);\n }\n \n- if (!mch->has_smm_ranges) {\n- return;\n- }\n-\n if (ranges_overlap(address, len, MCH_HOST_BRIDGE_SMRAM,\n MCH_HOST_BRIDGE_SMRAM_SIZE)) {\n mch_update_smram(mch);\n }\n \n+ if (!mch->has_smm_ranges) {\n+ return;\n+ }\n+\n if (ranges_overlap(address, len, MCH_HOST_BRIDGE_EXT_TSEG_MBYTES,\n MCH_HOST_BRIDGE_EXT_TSEG_MBYTES_SIZE)) {\n mch_update_ext_tseg_mbytes(mch);\n@@ -585,10 +589,6 @@ static void mch_realize(PCIDevice *d, Error **errp)\n PAM_EXPAN_BASE + i * PAM_EXPAN_SIZE, PAM_EXPAN_SIZE);\n }\n \n- if (!mch->has_smm_ranges) {\n- return;\n- }\n-\n /* if *disabled* show SMRAM to all CPUs */\n memory_region_init_alias(&mch->smram_region, OBJECT(mch), \"smram-region\",\n mch->pci_address_space, MCH_HOST_BRIDGE_SMRAM_C_BASE,\n@@ -604,6 +604,10 @@ static void mch_realize(PCIDevice *d, Error **errp)\n &mch->open_high_smram, 1);\n memory_region_set_enabled(&mch->open_high_smram, false);\n \n+ if (!mch->has_smm_ranges) {\n+ return;\n+ }\n+\n /* smram, as seen by SMM CPUs */\n memory_region_init(&mch->smram, OBJECT(mch), \"smram\", 4 * GiB);\n memory_region_set_enabled(&mch->smram, true);\n","prefixes":["PULL","2/3"]}