{"id":2223099,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2223099/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260414090350.34455-1-chen.huei.lok@altera.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260414090350.34455-1-chen.huei.lok@altera.com>","date":"2026-04-14T09:03:50","name":"[v3] drivers: fpga: Use SOC64 conditional instead of Agilex/Stratix10","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e69750e3437de56a38186446db397e4e37fd5a9c","submitter":{"id":92584,"url":"http://patchwork.ozlabs.org/api/1.1/people/92584/?format=json","name":"Chen Huei Lok","email":"chen.huei.lok@altera.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260414090350.34455-1-chen.huei.lok@altera.com/mbox/","series":[{"id":499836,"url":"http://patchwork.ozlabs.org/api/1.1/series/499836/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=499836","date":"2026-04-14T09:03:50","name":"[v3] drivers: fpga: Use SOC64 conditional instead of Agilex/Stratix10","version":3,"mbox":"http://patchwork.ozlabs.org/series/499836/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2223099/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223099/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=altera.com header.i=@altera.com header.a=rsa-sha256\n header.s=selector2 header.b=UMMCojmr;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Newer devices such as Agilex7M and Agilex5 also\nfall under SOC64 and require the same handling.\n\nSigned-off-by: drosdi \nSigned-off-by: Chen Huei Lok \n---\n drivers/fpga/altera.c | 6 ++----\n 1 file changed, 2 insertions(+), 4 deletions(-)\n\n--\n2.43.7","diff":"diff --git a/drivers/fpga/altera.c b/drivers/fpga/altera.c\nindex 822183c5785..7c7a6650b82 100644\n--- a/drivers/fpga/altera.c\n+++ b/drivers/fpga/altera.c\n@@ -12,8 +12,7 @@\n /*\n * Altera FPGA support\n */\n-#if IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX) || \\\n-\tIS_ENABLED(CONFIG_ARCH_SOCFPGA_STRATIX10)\n+#if IS_ENABLED(CONFIG_ARCH_SOCFPGA_SOC64)\n #include \n #endif\n #include \n@@ -48,8 +47,7 @@ static const struct altera_fpga {\n #endif\n };\n\n-#if IS_ENABLED(CONFIG_ARCH_SOCFPGA_AGILEX) || \\\n-\tIS_ENABLED(CONFIG_ARCH_SOCFPGA_STRATIX10)\n+#if IS_ENABLED(CONFIG_ARCH_SOCFPGA_SOC64)\n int fpga_is_partial_data(int devnum, size_t img_len)\n {\n \t/*\n","prefixes":["v3"]}