{"id":2222779,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2222779/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260413165217.47105-8-mohamed@unpredictable.fr/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260413165217.47105-8-mohamed@unpredictable.fr>","date":"2026-04-13T16:52:09","name":"[v11,07/15] whpx: i386: introduce proper cpuid support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f306b8146c1f1eae67346586d224711b36414e67","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.1/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260413165217.47105-8-mohamed@unpredictable.fr/mbox/","series":[{"id":499730,"url":"http://patchwork.ozlabs.org/api/1.1/series/499730/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499730","date":"2026-04-13T16:52:04","name":"whpx: i386: bug fixes, feature probing and CPUID","version":11,"mbox":"http://patchwork.ozlabs.org/series/499730/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222779/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222779/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=OsCUxbm8;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvYQn5Rsdz1yGC\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 02:54:09 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1wCKXC-0006r7-4u; Mon, 13 Apr 2026 12:53:14 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wCKXA-0006qe-2w\n for qemu-devel@nongnu.org; Mon, 13 Apr 2026 12:53:12 -0400","from p-west2-cluster3-host11-snip4-1.eps.apple.com ([57.103.69.24]\n helo=outbound.mr.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1wCKX8-0005VX-9V\n for qemu-devel@nongnu.org; Mon, 13 Apr 2026 12:53:11 -0400","from outbound.mr.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-west-2a-10-percent-1 (Postfix) with ESMTPS id\n 97ED71800CA4; Mon, 13 Apr 2026 16:53:08 +0000 (UTC)","from localhost.localdomain (unknown [17.57.152.38])\n by p00-icloudmta-asmtp-us-west-2a-10-percent-1 (Postfix) with ESMTPSA id\n DAD821803956; Mon, 13 Apr 2026 16:53:02 +0000 (UTC)"],"Dkim-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1776099189; x=1778691189;\n bh=6tmGSEaUrE0Q7MlYX6psbx8TA0g5EcgDAZR7bSJpGEE=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=OsCUxbm82gSFX1NVYlHKz3M75dhVELp/4h/jUMNZ5BvZMhpt0ZzQNbwN4EazaNRLzex28ScbGX+xInb28yWfiRJG/3HMnCts6LBuoVZzUFidT5EVMJ7AGXxiolome4rrB0a8FnTnZJBAmW90599WwKhxbx9PdfzF8R591qNP4M7qrj+MNhnq6qiX3lkJAmmp3zc6oT0nHEI7JHFqxS+++0Ag3g1mSS3Ba+eQTKd1O1nelpOTawNAwvCDM9oPSaKrQqlfGs1bxjDYIBvJdp7fgCyGsdySCKdg1/vm3Uynkw6BEdMdP0ZDsw4Q43AgRcneIgPT+PkSICnF1bDxaLSIjg==","mail-alias-created-date":"1752046281608","From":"Mohamed Mediouni <mohamed@unpredictable.fr>","To":"qemu-devel@nongnu.org","Cc":"\"Michael S. Tsirkin\" <mst@redhat.com>,\n Pedro Barbuda <pbarbuda@microsoft.com>,\n Mohamed Mediouni <mohamed@unpredictable.fr>,\n Paolo Bonzini <pbonzini@redhat.com>, Zhao Liu <zhao1.liu@intel.com>,\n Roman Bolshakov <rbolshakov@ddn.com>, Wei Liu <wei.liu@kernel.org>,\n Phil Dennis-Jordan <phil@philjordan.eu>","Subject":"[PATCH v11 07/15] whpx: i386: introduce proper cpuid support","Date":"Mon, 13 Apr 2026 18:52:09 +0200","Message-ID":"<20260413165217.47105-8-mohamed@unpredictable.fr>","X-Mailer":"git-send-email 2.50.1","In-Reply-To":"<20260413165217.47105-1-mohamed@unpredictable.fr>","References":"<20260413165217.47105-1-mohamed@unpredictable.fr>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Proofpoint-ORIG-GUID":"INMbt5N92POGJfvdNgp0_etOvfUDjD0s","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDEzMDE2NiBTYWx0ZWRfX/5fnR9SszYNG\n js//wnqLycvu3HCr/GuRJi23BO+SeAOUJHAdQnxBV3AELgUEvyueub1Yr22XvTmg8QF6kKl9ycf\n KI5UXRUuKLJou8aePU8JrEcRrYqb2i2923jdHF5xpgRwHOV/ni6TizhxuVWbYAY9e7wXXMClLFs\n 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<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<https://lists.nongnu.org/archive/html/qemu-devel>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Unlike the implementation in QEMU 10.2, this one works.\n\nIt's not optimal though as it doesn't use the Hyper-V support for this.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/i386/whpx/whpx-all.c | 123 ++++++++++++++++++++++++++++++++++--\n 1 file changed, 119 insertions(+), 4 deletions(-)","diff":"diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex c2a78312f8..9827c93df1 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -2071,6 +2071,7 @@ int whpx_vcpu_run(CPUState *cpu)\n             WHV_REGISTER_NAME reg_names[5];\n             UINT32 reg_count = 5;\n             X86CPU *x86_cpu = X86_CPU(cpu);\n+            X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);\n             CPUX86State *env = &x86_cpu->env;\n \n             reg_names[0] = WHvX64RegisterRip;\n@@ -2083,7 +2084,15 @@ int whpx_vcpu_run(CPUState *cpu)\n                 vcpu->exit_ctx.VpContext.Rip +\n                 vcpu->exit_ctx.VpContext.InstructionLength;\n \n-            if (whpx_is_legacy_os()) {\n+            /*\n+             * On Windows 10 we can't query features from\n+             * the Hyper-V interface.\n+             *\n+             * On Windows 11, if using xcc->max_features\n+             * just pass through what the hypervisor\n+             * provides without any QEMU filtering.\n+             */\n+            if (whpx_is_legacy_os() || xcc->max_features) {\n                 reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;\n                 reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;\n                 reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;\n@@ -2135,6 +2144,60 @@ int whpx_vcpu_run(CPUState *cpu)\n                     }\n                     break;\n                 }\n+            } else {\n+                switch (vcpu->exit_ctx.CpuidAccess.Rax) {\n+                case 0x40000000:\n+                case 0x40000001:\n+                case 0x40000010:\n+                    reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;\n+                    reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;\n+                    reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;\n+                    reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n+                    break;\n+                }\n+            }\n+\n+            if (vcpu->exit_ctx.CpuidAccess.Rax == 0x1) {\n+                if (cpu_has_x2apic_feature(env)) {\n+                    reg_values[2].Reg64 |= CPUID_EXT_X2APIC;\n+                } else {\n+                    reg_values[2].Reg32 &= CPUID_EXT_X2APIC;\n+                }\n+            }\n+\n+            /* Dynamic depending on XCR0 and XSS, so query DefaultResult */\n+            if (vcpu->exit_ctx.CpuidAccess.Rax == 0x07\n+                && vcpu->exit_ctx.CpuidAccess.Rcx == 0) {\n+                if (vcpu->exit_ctx.CpuidAccess.DefaultResultRdx\n+                    & CPUID_7_0_EDX_CET_IBT) {\n+                    reg_values[3].Reg32 |= CPUID_7_0_EDX_CET_IBT;\n+                } else {\n+                    reg_values[3].Reg32 &= ~CPUID_7_0_EDX_CET_IBT;\n+                }\n+\n+                if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+                    & CPUID_7_0_ECX_CET_SHSTK) {\n+                    reg_values[2].Reg32 |= CPUID_7_0_ECX_CET_SHSTK;\n+                } else {\n+                    reg_values[2].Reg32 &= ~CPUID_7_0_ECX_CET_SHSTK;\n+                }\n+\n+                if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+                    & CPUID_7_0_ECX_OSPKE) {\n+                    reg_values[2].Reg32 |= CPUID_7_0_ECX_OSPKE;\n+                } else {\n+                    reg_values[2].Reg32 &= ~CPUID_7_0_ECX_OSPKE;\n+                }\n+            }\n+\n+            /* OSXSAVE is dynamic. Do this instead of syncing CR4 */\n+            if (vcpu->exit_ctx.CpuidAccess.Rax == 1) {\n+                if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+                    & CPUID_EXT_OSXSAVE) {\n+                    reg_values[2].Reg32 |= CPUID_EXT_OSXSAVE;\n+                } else {\n+                    reg_values[2].Reg32 &= ~CPUID_EXT_OSXSAVE;\n+                }\n             }\n \n             hr = whp_dispatch.WHvSetVirtualProcessorRegisters(\n@@ -2324,6 +2387,45 @@ error:\n     return ret;\n }\n \n+static void whpx_cpu_xsave_init(void)\n+{\n+    static bool first = true;\n+    int i;\n+\n+    if (!first) {\n+        return;\n+    }\n+    first = false;\n+\n+    /* x87 and SSE states are in the legacy region of the XSAVE area. */\n+    x86_ext_save_areas[XSTATE_FP_BIT].offset = 0;\n+    x86_ext_save_areas[XSTATE_SSE_BIT].offset = 0;\n+\n+    for (i = XSTATE_SSE_BIT + 1; i < XSAVE_STATE_AREA_COUNT; i++) {\n+        ExtSaveArea *esa = &x86_ext_save_areas[i];\n+\n+        if (esa->size) {\n+            int sz = whpx_get_supported_cpuid(0xd, i, R_EAX);\n+            if (sz != 0) {\n+                assert(esa->size == sz);\n+                esa->offset = whpx_get_supported_cpuid(0xd, i, R_EBX);\n+            }\n+        }\n+    }\n+}\n+\n+static void whpx_cpu_max_instance_init(X86CPU *cpu)\n+{\n+    CPUX86State *env = &cpu->env;\n+\n+    env->cpuid_min_level =\n+        whpx_get_supported_cpuid(0x0, 0, R_EAX);\n+    env->cpuid_min_xlevel =\n+        whpx_get_supported_cpuid(0x80000000, 0, R_EAX);\n+    env->cpuid_min_xlevel2 =\n+        whpx_get_supported_cpuid(0xC0000000, 0, R_EAX);\n+}\n+\n static PropValue whpx_default_props[] = {\n     { \"x2apic\", \"on\" },\n     { NULL, NULL },\n@@ -2333,9 +2435,18 @@ static PropValue whpx_default_props[] = {\n void whpx_cpu_instance_init(CPUState *cs)\n {\n     X86CPU *cpu = X86_CPU(cs);\n+    X86CPUClass *xcc = X86_CPU_GET_CLASS(cpu);\n \n     host_cpu_instance_init(cpu);\n     x86_cpu_apply_props(cpu, whpx_default_props);\n+\n+    if (!whpx_is_legacy_os() && xcc->max_features) {\n+        whpx_cpu_max_instance_init(cpu);\n+    }\n+\n+    if (!whpx_is_legacy_os()) {\n+        whpx_cpu_xsave_init();\n+    }\n }\n \n /*\n@@ -2353,8 +2464,12 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n     WHV_CAPABILITY_FEATURES features = {0};\n     WHV_PROCESSOR_FEATURES_BANKS processor_features;\n     WHV_PROCESSOR_PERFMON_FEATURES perfmon_features;\n-    UINT32 cpuidExitList[] = {1};\n-    UINT32 cpuidExitList_nohyperv[] = {1, 0x40000000, 0x40000001, 0x40000010};\n+\n+    UINT32 cpuidExitList[] = {0x0, 0x1, 0x6, 0x7, 0x14, 0x24, 0x29, 0x1E,\n+        0x40000000, 0x40000001, 0x40000010, 0x80000000, 0x80000001,\n+        0x80000002, 0x80000003, 0x80000004, 0x80000007, 0x80000008,\n+        0x8000000A, 0x80000021, 0x80000022, 0xC0000000, 0xC0000001};\n+    UINT32 cpuidExitList_legacy_os[] = {1, 0x40000000, 0x40000001, 0x40000010};\n \n     whpx = &whpx_global;\n \n@@ -2610,7 +2725,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n     hr = whp_dispatch.WHvSetPartitionProperty(\n         whpx->partition,\n         WHvPartitionPropertyCodeCpuidExitList,\n-        whpx->hyperv_enlightenments_enabled ? cpuidExitList : cpuidExitList_nohyperv,\n+        !whpx_is_legacy_os() ? cpuidExitList : cpuidExitList_legacy_os,\n         RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32));\n \n     if (FAILED(hr)) {\n","prefixes":["v11","07/15"]}