{"id":2222731,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2222731/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413-waveshare-dsi-touch-v3-17-3aeb53022c32@oss.qualcomm.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.1/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260413-waveshare-dsi-touch-v3-17-3aeb53022c32@oss.qualcomm.com>","date":"2026-04-13T14:05:40","name":"[v3,17/21] drm/panel: ilitek-ili9881c: support Waveshare 7.0\" DSI panel","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"53cc4a558057642000693aa932776317ac18e8e0","submitter":{"id":90483,"url":"http://patchwork.ozlabs.org/api/1.1/people/90483/?format=json","name":"Dmitry Baryshkov","email":"dmitry.baryshkov@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260413-waveshare-dsi-touch-v3-17-3aeb53022c32@oss.qualcomm.com/mbox/","series":[{"id":499710,"url":"http://patchwork.ozlabs.org/api/1.1/series/499710/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=499710","date":"2026-04-13T14:05:24","name":"drm/panel: support Waveshare DSI TOUCH kits","version":3,"mbox":"http://patchwork.ozlabs.org/series/499710/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222731/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222731/checks/","tags":{},"headers":{"Return-Path":"\n <linux-gpio+bounces-35112-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=LG5NY+Pi;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=NFKqQyAB;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35112-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"LG5NY+Pi\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"NFKqQyAB\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.168.131","smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fvTvD3LlJz1yDF\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 14 Apr 2026 00:15:04 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 236BB307C74C\n\tfor <incoming@patchwork.ozlabs.org>; Mon, 13 Apr 2026 14:07:33 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 72B253DD506;\n\tMon, 13 Apr 2026 14:06:23 +0000 (UTC)","from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 7272C3D567C\n\tfor <linux-gpio@vger.kernel.org>; Mon, 13 Apr 2026 14:06:21 +0000 (UTC)","from pps.filterd (m0279865.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 63DC7d4e2186235\n\tfor <linux-gpio@vger.kernel.org>; Mon, 13 Apr 2026 14:06:21 GMT","from mail-oi1-f197.google.com (mail-oi1-f197.google.com\n [209.85.167.197])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dh07hgday-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor <linux-gpio@vger.kernel.org>; Mon, 13 Apr 2026 14:06:20 +0000 (GMT)","by mail-oi1-f197.google.com with SMTP id\n 5614622812f47-4639f4233beso5418828b6e.3\n        for <linux-gpio@vger.kernel.org>;\n Mon, 13 Apr 2026 07:06:20 -0700 (PDT)","from umbar.lan\n (2001-14ba-a073-af00-264b-feff-fe8b-be8a.rev.dnainternet.fi.\n [2001:14ba:a073:af00:264b:feff:fe8b:be8a])\n        by smtp.gmail.com with ESMTPSA id\n 2adb3069b0e04-5a3eee8c91csm2687521e87.19.2026.04.13.07.06.15\n        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n        Mon, 13 Apr 2026 07:06:16 -0700 (PDT)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1776089183; cv=none;\n b=uRHINsrZWBCxw0FYazAHkIf7yMBV7iKWc6kbkEbtTHJ/EYkWvtVaF1sRDKLEeNhRM94bkpml23LwcAjWRqx1hVCyfGWtvhDk/BS5Ha/ZYIOpaMUOuGk1O8tkS1V4XqMmiK53XsufCE0OLHN2LF1j2vOVhHh2iWwPEtQP16XLUDo=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1776089183; c=relaxed/simple;\n\tbh=GeCr1NynOzRyMTA3YNx3AI6OZgpUDXwfoJ9GX7n6oNY=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=GbVKAi8NJPCiPsMcFm/rPqQCKMHwDH8ru9bFJQbCC0AL9m5NSKx8VHP/78S+sowBgQM/T1QireDQ59O26Mx3qaHCknxpZZ4rBS1ty0CCG8vsxrEAu3Q6mM/MiXWiv7dI5sGJnnTgZNlPUyNdxDsCVKwgby6RcFMxUMRkSLb4aOM=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com;\n spf=pass smtp.mailfrom=oss.qualcomm.com;\n dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=LG5NY+Pi;\n dkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=NFKqQyAB; arc=none smtp.client-ip=205.220.168.131","DKIM-Signature":["v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=qcppdkim1; bh=\n\tnZzwGnW+MUE+QNALit7cwinZB2Bkr8D00pSmlzKzjwY=; b=LG5NY+Pi0JSGKiq6\n\th96u85L/ucDxf1wx8QW51qoTgaaO9/qaMZWUqDBdQEEuv9zRF/ZePEOf5Cma21ox\n\tR0Kq+jCof/SVZsN/Fgmsb6BG3byOJYUDmBOtyk8cewgebFbhAneCg/l0ciJGA0cz\n\tbLFmvVQ954usSpdjhK5Ugk38IHR6txlw3pI1XTKwCA04WR6h+5b8xDl7u1+llTbS\n\t720cmazg5ZXNtKF78P4A/0V+QDpZzFSRuGCWXUdKM09Lq9riWmJ53HG881khHBe9\n\tSc328R3EmjBCAcvMCO9dBublqJt51XX4YNcRQGi/p26VXQE+BWvOHdahvSgerPcy\n\tnByc7g==","v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=oss.qualcomm.com; s=google; t=1776089180; x=1776693980;\n darn=vger.kernel.org;\n        h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n         :mime-version:subject:date:from:from:to:cc:subject:date:message-id\n         :reply-to;\n        bh=nZzwGnW+MUE+QNALit7cwinZB2Bkr8D00pSmlzKzjwY=;\n        b=NFKqQyABB/68+2wLW9P7IHQRjPNDiYFEDyAMaNOzrxP4T7mlWEFzTRTiAhtl/K59Ra\n         6mA67cKGWTDVH9sKCtQAEkxhKtvxHyeo1u4vb6w0NyfXPySCRuXy/UrA6tO/D8+lZXNu\n         nFidOSxaeP1/ATNSB4n6CKCLvwuLxCoL4mPnWbiSPNeQ6Q22c9qzr9lowyyQ8bAA+EWE\n         e1zqsrvNbAN4SEwXyUGL3ZTqGqY2U2dhoxH1VVKQixyxQfACb3C193H/X0k6sM1PISnO\n         c/zcjK1KUIpLH0mjR6fy8UBas3RnvQBsT4Q8Tz3FHP/y+tMhTQ3of0D6x3j8hf2aqyEo\n         ZeHg=="],"X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20251104; t=1776089180; x=1776693980;\n        h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n         :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to\n         :cc:subject:date:message-id:reply-to;\n        bh=nZzwGnW+MUE+QNALit7cwinZB2Bkr8D00pSmlzKzjwY=;\n        b=cLc1b0O66hTWip/UjTEFRvoE35XxbNO9scykmHoE0PTi7bfukccX+DtvGJ9nqAVD+k\n         ukycYSVv1zgsy0IMj/wWMUpqrGWmFdMTtR+hEB80hYXut6uGhgbMqNzJwyrfKKpi0Ort\n         FNujhLppX+vAWJNzFWVudHeplKE9n+1wqkGVgyejueTYaSQC3+M2BiU4hQWnm3OWWZZB\n         aD8KsZyvgYj2LZ21nV6Nj7+qZTDqv5qCtSdqi3CGOwQMx6kJpGlCtzaW5oJlTiESmfUI\n         80RttaDTyebXIG/VABhG+StE1mUAXN1W6QCsqeS8TM03mrlmF84W9gcRf2no0rI7MKkG\n         h8hw==","X-Forwarded-Encrypted":"i=1;\n AFNElJ/ymLtaJcLuroHVYr5maS6hCi0A+fJf4ub/eSueAl6mbZhAkk6I2yQ4L6XNWHzz3DotKns5NHgbMW+i@vger.kernel.org","X-Gm-Message-State":"AOJu0YxJM1p8Gw7pFc8aQrdzQoeo5yzjH6ah9mQLFbQ4WU1FWZYrom7/\n\tF+ioe7wzKqeDEwj5BazL0tq+3OWd1v9SdAVtAZGOZLAg4g3LBn6iotVJd7tWH7r68Qko7nHSSlH\n\t4jwyb2GRag1B4XO9QT1LU8b9J0JsDXcC0ftswLDE6hhk2WPo7nNN2uHa6yU6FFkeX","X-Gm-Gg":"AeBDieteI1wnGsOTXJ7DA5S71s37njMSAxtrxtO1KavbEYUet8ucKB1ingBLd1yTuIv\n\t/OISi2UFADKEkeu81PmiCyw9wmGx2rRKS3nimTiydM7y6DkIvslEMjs9k3EArR9uV8+0Pj+CEaH\n\tAOOVG2oiCUbQiJ93MJCGcOJSQo53XqQUQNV/h/V/49rQQLx3R/JvtdPfsbkASw8vJ65YbrFxHlc\n\tSpKZTY/Ge04GDAF5is5brnIpu9N6y462/0VoZKXt3CpR1SwGOems+D8SvnZCJ196hWidHWA1swB\n\tgr+BIgcQ5zU9SPvNN00ehm7vRNiD2P3AvRqY/iQn68vq64+rtlxMW7I1eJyBg9dAV20jVFdmCgp\n\tZiXV5O3Lr+TFWTBXOfEEXLwhPzfijv9lhqpdIcBEVLjKMSLMGtclM9CJ8yFHrorZTxpFsORlr3Y\n\tZCeCaOdv6c7d7rRkcB624fDRKDjKID5U76ZJQ=","X-Received":["by 2002:a05:6808:1522:b0:467:14c7:a8ae with SMTP id\n 5614622812f47-4789e622f86mr6479131b6e.21.1776089179615;\n        Mon, 13 Apr 2026 07:06:19 -0700 (PDT)","by 2002:a05:6808:1522:b0:467:14c7:a8ae with SMTP id\n 5614622812f47-4789e622f86mr6479077b6e.21.1776089179019;\n        Mon, 13 Apr 2026 07:06:19 -0700 (PDT)"],"From":"Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>","Date":"Mon, 13 Apr 2026 17:05:40 +0300","Subject":"[PATCH v3 17/21] drm/panel: ilitek-ili9881c: support Waveshare\n 7.0\" DSI panel","Precedence":"bulk","X-Mailing-List":"linux-gpio@vger.kernel.org","List-Id":"<linux-gpio.vger.kernel.org>","List-Subscribe":"<mailto:linux-gpio+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-gpio+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260413-waveshare-dsi-touch-v3-17-3aeb53022c32@oss.qualcomm.com>","References":"<20260413-waveshare-dsi-touch-v3-0-3aeb53022c32@oss.qualcomm.com>","In-Reply-To":"<20260413-waveshare-dsi-touch-v3-0-3aeb53022c32@oss.qualcomm.com>","To":"Neil Armstrong <neil.armstrong@linaro.org>,\n        Jessica Zhang <jesszhan0024@gmail.com>,\n        David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,\n        Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,\n        Maxime Ripard <mripard@kernel.org>,\n        Thomas Zimmermann <tzimmermann@suse.de>,\n Rob Herring <robh@kernel.org>,\n        Krzysztof Kozlowski <krzk+dt@kernel.org>,\n        Conor Dooley <conor+dt@kernel.org>,\n        Cong Yang <yangcong5@huaqin.corp-partner.google.com>,\n        Ondrej Jirman <megi@xff.cz>,\n        Javier Martinez Canillas <javierm@redhat.com>,\n        Jagan Teki <jagan@edgeble.ai>, Liam Girdwood <lgirdwood@gmail.com>,\n        Mark Brown <broonie@kernel.org>, Linus Walleij <linusw@kernel.org>,\n        Bartosz Golaszewski <brgl@kernel.org>,\n        Jie Gan <jie.gan@oss.qualcomm.com>","Cc":"dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,\n        linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org","X-Mailer":"b4 0.15.1","X-Developer-Signature":"v=1; a=openpgp-sha256; l=11997;\n i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id;\n bh=GeCr1NynOzRyMTA3YNx3AI6OZgpUDXwfoJ9GX7n6oNY=;\n b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBp3PgoEazS3iiLO6YPAUW3BcEYAgTzIFkPsjNP/\n QRyhQlsK5uJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCadz4KAAKCRCLPIo+Aiko\n 1YF6B/9s5dpc02hK1GowswGbkgaW/Srn1QWdWLtkNXUCTW+nUCISzCR1uAjMDXTk3cx6SycTUwq\n x6fau7FwhBVv3PCFbHhS/swt56IDjJJMP26AcINYxA8QfBsrVUzrTEqGxLV2LMBEbceSgoCcowu\n o24m15wGccUyHLy7+2u+9Q2ZuuLRbUxsqE+99mrbgPC8dh4ioGgWtPytJ3qCS9YArUEu1UHuQ7C\n O+n7QscJixTIC8b3bcQnqDHB3Dg6ITGMf8l1kfVxgAQ1SnUGAaUWycdLkLyKhk8ZketPPWF2RCi\n VpshToFco7+EyPZ9Mfvaj+KuzbXuenM74tc76omgjtLNxrDA","X-Developer-Key":"i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp;\n fpr=8F88381DD5C873E4AE487DA5199BF1243632046A","X-Proofpoint-ORIG-GUID":"MKihj0L2TPsc1uLu7GOYTe3i41hH4e5v","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDEzMDEzOCBTYWx0ZWRfXx/ZyZJMZdUuN\n o7JEX5/dVZWVnY93Gifpo4AVho6HNLr6N8BFJYBkA9THOotTtlpBE7p5pHpuiHEofQqKWC3huB/\n 9ksdaCm83ux8ZtaWjYo1d0pLysRj0Flpx2Wg2TUORySRTqvnqJ61FLCKvzrQ8KWcX/vpqRwhp22\n lXOAdsdD2zBFdJN1cJZ5q9QovBJi4aGYfdadjhfOCq5PWPYjH8cRZE1mD2Q4a7/zAOyTUIxGOjE\n 0d+OoK7MAvTo5mLYZyJw+fyAgaHNEyigO5u27o3sV3AuACpB2VfTg99V7gwAicDdsOBE++XD+X8\n Iir8+PjA0ySd2DfUxwZ+0oli3byFvinfbrF7jGHI2kp6j/vx+qUtSFZ/NFiORKUd5iJu4lN0tRe\n 7Yt8rMZpxSCV3t9waG5p4b/XP5kvlEgA223WAAQX1FhiARD7qCgGIrRZ9gGLVeodirpfLsqm/fw\n ayZTEWLbtA7MGS5ypZw==","X-Proofpoint-GUID":"MKihj0L2TPsc1uLu7GOYTe3i41hH4e5v","X-Authority-Analysis":"v=2.4 cv=QtNuG1yd c=1 sm=1 tr=0 ts=69dcf85c cx=c_pps\n a=WJcna6AvsNCxL/DJwPP1KA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10\n a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=u7WPNUs3qKkmUXheDGA7:22 a=Um2Pa8k9VHT-vaBCBUpS:22 a=EUspDBNiAAAA:8\n a=Vzx2zukWpxHvXuQtFQgA:9 a=QEXdDO2ut3YA:10 a=_Y9Zt4tPzoBS9L09Snn2:22","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-13_03,2026-04-13_03,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 impostorscore=0 adultscore=0 phishscore=0 malwarescore=0\n bulkscore=0 clxscore=1015 lowpriorityscore=0 spamscore=0 suspectscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604010000 definitions=main-2604130138"},"content":"Enable support for Waveshare 7.0\" DSI TOUCH-A panel. It requires\nadditional voltage regulator, iovcc.\n\nSigned-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>\n---\n drivers/gpu/drm/panel/panel-ilitek-ili9881c.c | 251 +++++++++++++++++++++++++-\n 1 file changed, 249 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c\nindex 947b47841b01..0652cdb57d11 100644\n--- a/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c\n+++ b/drivers/gpu/drm/panel/panel-ilitek-ili9881c.c\n@@ -52,6 +52,7 @@ struct ili9881c {\n \tconst struct ili9881c_desc\t*desc;\n \n \tstruct regulator\t*power;\n+\tstruct regulator\t*iovcc;\n \tstruct gpio_desc\t*reset;\n \n \tenum drm_panel_orientation\torientation;\n@@ -1997,6 +1998,205 @@ static const struct ili9881c_instr bsd1218_a101kl68_init[] = {\n \tILI9881C_COMMAND_INSTR(0xd3, 0x3f),\n };\n \n+static const struct ili9881c_instr waveshare_7inch_a_init[] = {\n+\tILI9881C_SWITCH_PAGE_INSTR(3),\n+\tILI9881C_COMMAND_INSTR(0x01, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x02, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x03, 0x73),\n+\tILI9881C_COMMAND_INSTR(0x04, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x05, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x06, 0x0a),\n+\tILI9881C_COMMAND_INSTR(0x07, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x08, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x09, 0x61),\n+\tILI9881C_COMMAND_INSTR(0x0a, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x0b, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x0c, 0x01),\n+\tILI9881C_COMMAND_INSTR(0x0d, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x0e, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x0f, 0x61),\n+\tILI9881C_COMMAND_INSTR(0x10, 0x61),\n+\tILI9881C_COMMAND_INSTR(0x11, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x12, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x13, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x14, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x15, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x16, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x17, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x18, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x19, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x1a, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x1b, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x1c, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x1d, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x1e, 0x40),\n+\tILI9881C_COMMAND_INSTR(0x1f, 0x80),\n+\tILI9881C_COMMAND_INSTR(0x20, 0x06),\n+\tILI9881C_COMMAND_INSTR(0x21, 0x01),\n+\tILI9881C_COMMAND_INSTR(0x22, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x23, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x24, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x25, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x26, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x27, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x28, 0x33),\n+\tILI9881C_COMMAND_INSTR(0x29, 0x03),\n+\tILI9881C_COMMAND_INSTR(0x2a, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x2b, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x2c, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x2d, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x2e, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x2f, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x30, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x31, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x32, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x33, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x34, 0x04),\n+\tILI9881C_COMMAND_INSTR(0x35, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x36, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x37, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x38, 0x3c),\n+\tILI9881C_COMMAND_INSTR(0x39, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x3a, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x3b, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x3c, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x3d, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x3e, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x3f, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x40, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x41, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x42, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x43, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x44, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x50, 0x10),\n+\tILI9881C_COMMAND_INSTR(0x51, 0x32),\n+\tILI9881C_COMMAND_INSTR(0x52, 0x54),\n+\tILI9881C_COMMAND_INSTR(0x53, 0x76),\n+\tILI9881C_COMMAND_INSTR(0x54, 0x98),\n+\tILI9881C_COMMAND_INSTR(0x55, 0xba),\n+\tILI9881C_COMMAND_INSTR(0x56, 0x10),\n+\tILI9881C_COMMAND_INSTR(0x57, 0x32),\n+\tILI9881C_COMMAND_INSTR(0x58, 0x54),\n+\tILI9881C_COMMAND_INSTR(0x59, 0x76),\n+\tILI9881C_COMMAND_INSTR(0x5a, 0x98),\n+\tILI9881C_COMMAND_INSTR(0x5b, 0xba),\n+\tILI9881C_COMMAND_INSTR(0x5c, 0xdc),\n+\tILI9881C_COMMAND_INSTR(0x5d, 0xfe),\n+\tILI9881C_COMMAND_INSTR(0x5e, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x5f, 0x0e),\n+\tILI9881C_COMMAND_INSTR(0x60, 0x0f),\n+\tILI9881C_COMMAND_INSTR(0x61, 0x0c),\n+\tILI9881C_COMMAND_INSTR(0x62, 0x0d),\n+\tILI9881C_COMMAND_INSTR(0x63, 0x06),\n+\tILI9881C_COMMAND_INSTR(0x64, 0x07),\n+\tILI9881C_COMMAND_INSTR(0x65, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x66, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x67, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x68, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x69, 0x01),\n+\tILI9881C_COMMAND_INSTR(0x6a, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x6b, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x6c, 0x15),\n+\tILI9881C_COMMAND_INSTR(0x6d, 0x14),\n+\tILI9881C_COMMAND_INSTR(0x6e, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x6f, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x70, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x71, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x72, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x73, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x74, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x75, 0x0e),\n+\tILI9881C_COMMAND_INSTR(0x76, 0x0f),\n+\tILI9881C_COMMAND_INSTR(0x77, 0x0c),\n+\tILI9881C_COMMAND_INSTR(0x78, 0x0d),\n+\tILI9881C_COMMAND_INSTR(0x79, 0x06),\n+\tILI9881C_COMMAND_INSTR(0x7a, 0x07),\n+\tILI9881C_COMMAND_INSTR(0x7b, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x7c, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x7d, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x7e, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x7f, 0x01),\n+\tILI9881C_COMMAND_INSTR(0x80, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x81, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x82, 0x14),\n+\tILI9881C_COMMAND_INSTR(0x83, 0x15),\n+\tILI9881C_COMMAND_INSTR(0x84, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x85, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x86, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x87, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x88, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x89, 0x02),\n+\tILI9881C_COMMAND_INSTR(0x8a, 0x02),\n+\n+\tILI9881C_SWITCH_PAGE_INSTR(4),\n+\tILI9881C_COMMAND_INSTR(0x38, 0x01),\n+\tILI9881C_COMMAND_INSTR(0x39, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x6c, 0x15),\n+\tILI9881C_COMMAND_INSTR(0x6e, 0x2a),\n+\tILI9881C_COMMAND_INSTR(0x6f, 0x33),\n+\tILI9881C_COMMAND_INSTR(0x3a, 0x94),\n+\tILI9881C_COMMAND_INSTR(0x8d, 0x14),\n+\tILI9881C_COMMAND_INSTR(0x87, 0xba),\n+\tILI9881C_COMMAND_INSTR(0x26, 0x76),\n+\tILI9881C_COMMAND_INSTR(0xb2, 0xd1),\n+\tILI9881C_COMMAND_INSTR(0xb5, 0x06),\n+\tILI9881C_COMMAND_INSTR(0x3b, 0x98),\n+\n+\tILI9881C_SWITCH_PAGE_INSTR(1),\n+\tILI9881C_COMMAND_INSTR(0x22, 0x0a),\n+\tILI9881C_COMMAND_INSTR(0x31, 0x00),\n+\tILI9881C_COMMAND_INSTR(0x53, 0x71),\n+\tILI9881C_COMMAND_INSTR(0x55, 0x8f),\n+\tILI9881C_COMMAND_INSTR(0x40, 0x33),\n+\tILI9881C_COMMAND_INSTR(0x50, 0x96),\n+\tILI9881C_COMMAND_INSTR(0x51, 0x96),\n+\tILI9881C_COMMAND_INSTR(0x60, 0x23),\n+\tILI9881C_COMMAND_INSTR(0xa0, 0x08),\n+\tILI9881C_COMMAND_INSTR(0xa1, 0x1d),\n+\tILI9881C_COMMAND_INSTR(0xa2, 0x2a),\n+\tILI9881C_COMMAND_INSTR(0xa3, 0x10),\n+\tILI9881C_COMMAND_INSTR(0xa4, 0x15),\n+\tILI9881C_COMMAND_INSTR(0xa5, 0x28),\n+\tILI9881C_COMMAND_INSTR(0xa6, 0x1c),\n+\tILI9881C_COMMAND_INSTR(0xa7, 0x1d),\n+\tILI9881C_COMMAND_INSTR(0xa8, 0x7e),\n+\tILI9881C_COMMAND_INSTR(0xa9, 0x1d),\n+\tILI9881C_COMMAND_INSTR(0xaa, 0x29),\n+\tILI9881C_COMMAND_INSTR(0xab, 0x6b),\n+\tILI9881C_COMMAND_INSTR(0xac, 0x1a),\n+\tILI9881C_COMMAND_INSTR(0xad, 0x18),\n+\tILI9881C_COMMAND_INSTR(0xae, 0x4b),\n+\tILI9881C_COMMAND_INSTR(0xaf, 0x20),\n+\tILI9881C_COMMAND_INSTR(0xb0, 0x27),\n+\tILI9881C_COMMAND_INSTR(0xb1, 0x50),\n+\tILI9881C_COMMAND_INSTR(0xb2, 0x64),\n+\tILI9881C_COMMAND_INSTR(0xb3, 0x39),\n+\tILI9881C_COMMAND_INSTR(0xc0, 0x08),\n+\tILI9881C_COMMAND_INSTR(0xc1, 0x1d),\n+\tILI9881C_COMMAND_INSTR(0xc2, 0x2a),\n+\tILI9881C_COMMAND_INSTR(0xc3, 0x10),\n+\tILI9881C_COMMAND_INSTR(0xc4, 0x15),\n+\tILI9881C_COMMAND_INSTR(0xc5, 0x28),\n+\tILI9881C_COMMAND_INSTR(0xc6, 0x1c),\n+\tILI9881C_COMMAND_INSTR(0xc7, 0x1d),\n+\tILI9881C_COMMAND_INSTR(0xc8, 0x7e),\n+\tILI9881C_COMMAND_INSTR(0xc9, 0x1d),\n+\tILI9881C_COMMAND_INSTR(0xca, 0x29),\n+\tILI9881C_COMMAND_INSTR(0xcb, 0x6b),\n+\tILI9881C_COMMAND_INSTR(0xcc, 0x1a),\n+\tILI9881C_COMMAND_INSTR(0xcd, 0x18),\n+\tILI9881C_COMMAND_INSTR(0xce, 0x4b),\n+\tILI9881C_COMMAND_INSTR(0xcf, 0x20),\n+\tILI9881C_COMMAND_INSTR(0xd0, 0x27),\n+\tILI9881C_COMMAND_INSTR(0xd1, 0x50),\n+\tILI9881C_COMMAND_INSTR(0xd2, 0x64),\n+\tILI9881C_COMMAND_INSTR(0xd3, 0x39),\n+\n+\tILI9881C_SWITCH_PAGE_INSTR(0),\n+\tILI9881C_COMMAND_INSTR(0x3a, 0x77),\n+\tILI9881C_COMMAND_INSTR(0x36, 0x00),\n+};\n+\n static inline struct ili9881c *panel_to_ili9881c(struct drm_panel *panel)\n {\n \treturn container_of(panel, struct ili9881c, panel);\n@@ -2035,9 +2235,19 @@ static int ili9881c_prepare(struct drm_panel *panel)\n \tint ret;\n \n \t/* Power the panel */\n+\tif (ctx->iovcc) {\n+\t\tret = regulator_enable(ctx->iovcc);\n+\t\tif (ret)\n+\t\t\treturn ret;\n+\t}\n+\n+\tmsleep(5);\n \tret = regulator_enable(ctx->power);\n-\tif (ret)\n-\t\treturn ret;\n+\tif (ret) {\n+\t\tmctx.accum_err = ret;\n+\t\tgoto disable_iovcc;\n+\t}\n+\n \tmsleep(5);\n \n \t/* And reset it */\n@@ -2074,6 +2284,9 @@ static int ili9881c_prepare(struct drm_panel *panel)\n \n disable_power:\n \tregulator_disable(ctx->power);\n+disable_iovcc:\n+\tif (ctx->iovcc)\n+\t\tregulator_disable(ctx->iovcc);\n \treturn mctx.accum_err;\n }\n \n@@ -2085,6 +2298,8 @@ static int ili9881c_unprepare(struct drm_panel *panel)\n \tmipi_dsi_dcs_set_display_off_multi(&mctx);\n \tmipi_dsi_dcs_enter_sleep_mode_multi(&mctx);\n \tregulator_disable(ctx->power);\n+\tif (ctx->iovcc)\n+\t\tregulator_disable(ctx->iovcc);\n \tgpiod_set_value_cansleep(ctx->reset, 1);\n \n \treturn 0;\n@@ -2260,6 +2475,23 @@ static const struct drm_display_mode bsd1218_a101kl68_default_mode = {\n \t.height_mm\t= 170,\n };\n \n+static const struct drm_display_mode waveshare_7inch_a_mode = {\n+\t.clock\t\t= 83333,\n+\n+\t.hdisplay\t= 720,\n+\t.hsync_start\t= 720 + 120,\n+\t.hsync_end\t= 720 + 120 + 100,\n+\t.htotal\t\t= 720 + 120 + 100 + 100,\n+\n+\t.vdisplay\t= 1280,\n+\t.vsync_start\t= 1280 + 10,\n+\t.vsync_end\t= 1280 + 10 + 10,\n+\t.vtotal\t\t= 1280 + 10 + 10 + 10,\n+\n+\t.width_mm\t= 85,\n+\t.height_mm\t= 154,\n+};\n+\n static int ili9881c_get_modes(struct drm_panel *panel,\n \t\t\t      struct drm_connector *connector)\n {\n@@ -2329,6 +2561,11 @@ static int ili9881c_dsi_probe(struct mipi_dsi_device *dsi)\n \t\treturn dev_err_probe(&dsi->dev, PTR_ERR(ctx->power),\n \t\t\t\t     \"Couldn't get our power regulator\\n\");\n \n+\tctx->iovcc = devm_regulator_get_optional(&dsi->dev, \"iovcc\");\n+\tif (IS_ERR(ctx->iovcc))\n+\t\treturn dev_err_probe(&dsi->dev, PTR_ERR(ctx->iovcc),\n+\t\t\t\t     \"Couldn't get our iovcc regulator\\n\");\n+\n \tctx->reset = devm_gpiod_get_optional(&dsi->dev, \"reset\", GPIOD_OUT_LOW);\n \tif (IS_ERR(ctx->reset))\n \t\treturn dev_err_probe(&dsi->dev, PTR_ERR(ctx->reset),\n@@ -2454,6 +2691,15 @@ static const struct ili9881c_desc bsd1218_a101kl68_desc = {\n \t.lanes = 4,\n };\n \n+static const struct ili9881c_desc waveshare_7inch_a_desc = {\n+\t.init = waveshare_7inch_a_init,\n+\t.init_length = ARRAY_SIZE(waveshare_7inch_a_init),\n+\t.mode = &waveshare_7inch_a_mode,\n+\t.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_HSE |\n+\t\t      MIPI_DSI_MODE_LPM | MIPI_DSI_CLOCK_NON_CONTINUOUS,\n+\t.lanes = 2,\n+};\n+\n static const struct of_device_id ili9881c_of_match[] = {\n \t{ .compatible = \"bananapi,lhr050h41\", .data = &lhr050h41_desc },\n \t{ .compatible = \"bestar,bsd1218-a101kl68\", .data = &bsd1218_a101kl68_desc },\n@@ -2462,6 +2708,7 @@ static const struct of_device_id ili9881c_of_match[] = {\n \t{ .compatible = \"tdo,tl050hdv35\", .data = &tl050hdv35_desc },\n \t{ .compatible = \"wanchanglong,w552946aaa\", .data = &w552946aaa_desc },\n \t{ .compatible = \"wanchanglong,w552946aba\", .data = &w552946aba_desc },\n+\t{ .compatible = \"waveshare,7.0-dsi-touch-a\", .data = &waveshare_7inch_a_desc },\n \t{ .compatible = \"ampire,am8001280g\", .data = &am8001280g_desc },\n \t{ .compatible = \"raspberrypi,dsi-5inch\", &rpi_5inch_desc },\n \t{ .compatible = \"raspberrypi,dsi-7inch\", &rpi_7inch_desc },\n","prefixes":["v3","17/21"]}