{"id":2222284,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2222284/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260411070637.72421-5-james.hilliard1@gmail.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260411070637.72421-5-james.hilliard1@gmail.com>","date":"2026-04-11T07:06:31","name":"[5/9] target/mips: add Octeon SMS4 crypto support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"797772c7e4e8ce64fd46f616d350f81ee368c202","submitter":{"id":66301,"url":"http://patchwork.ozlabs.org/api/1.1/people/66301/?format=json","name":"James Hilliard","email":"james.hilliard1@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260411070637.72421-5-james.hilliard1@gmail.com/mbox/","series":[{"id":499531,"url":"http://patchwork.ozlabs.org/api/1.1/series/499531/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499531","date":"2026-04-11T07:06:33","name":"[1/9] linux-user/mips, target/mips: honor MIPS_FIXADE for unaligned accesses","version":1,"mbox":"http://patchwork.ozlabs.org/series/499531/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222284/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222284/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=JgSjoXFg;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4ft4Wj359cz1yGb\n\tfor ; Sat, 11 Apr 2026 17:08:17 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wBSQs-0001aG-Kw; Sat, 11 Apr 2026 03:07:06 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wBSQq-0001Zo-L9\n for qemu-devel@nongnu.org; Sat, 11 Apr 2026 03:07:04 -0400","from mail-oa1-x32.google.com ([2001:4860:4864:20::32])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wBSQo-00010E-RF\n for qemu-devel@nongnu.org; Sat, 11 Apr 2026 03:07:04 -0400","by mail-oa1-x32.google.com with SMTP id\n 586e51a60fabf-4094b31a037so1949169fac.1\n for ; Sat, 11 Apr 2026 00:07:02 -0700 (PDT)","from Mac.localdomain (71-218-253-186.hlrn.qwest.net.\n [71.218.253.186]) by smtp.gmail.com with ESMTPSA id\n 5614622812f47-478a0f1e841sm2651091b6e.5.2026.04.11.00.07.00\n (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256);\n Sat, 11 Apr 2026 00:07:01 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=gmail.com; s=20251104; t=1775891221; x=1776496021; darn=nongnu.org;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n :message-id:reply-to;\n bh=ILzL3Jim9OA/Ssv/nVzqqnWJdD1VSRHtuqTQWWGsyRs=;\n b=JgSjoXFgePsMtm9+W9NZD1JcspVmgaktCZfUjgQeb7z+D0YCDOWVQEsPbp/HWods0s\n +l3WTY7uF9YY8FV9MYqV0JuqB6NVd9MWTER6VFub2vTOuXS9XX67y9L1CDnnMpEr9MmL\n C5BVyKSmH6W5EQlcrnER5l6/hw2ADr6gdNG9+D9dQ/B2cIOFJdxXdT2J6Fc9IVDMPGdm\n T44rNz6jAOTd/nFrqMzTNxxhG9x16wH5k1jP7AeHARYobBL2CLgVHGXJHyNBaHGIumJ4\n OQfrL2/7aE0/gpiyWsqzm35gbc79Pxg0gS0SHnf/v5UC5svIXjUaxgv38mooJH9v8yo5\n TTUg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20251104; t=1775891221; x=1776496021;\n h=content-transfer-encoding:mime-version:references:in-reply-to\n :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n :to:cc:subject:date:message-id:reply-to;\n bh=ILzL3Jim9OA/Ssv/nVzqqnWJdD1VSRHtuqTQWWGsyRs=;\n b=Q7do9lOZ5paOIOeQ7/J+p8+r27fDfVg1G15iZKfaO472LNkAVbvG6zFa7AnSoZOboe\n 4yrf/iQd7fcg0asxnnNy9Aus4Pya7eVOIA6qjAV5iPmtvaJXz9h/4JGW/quj3DtdNN4v\n +fFodV7jnaYr3UmMwgJm4+JzE2mCx9i49u8oCK4udnZJzWj1tVZ7dKVMDQDIgD3ot4PO\n wAFHyQ6FGdVUN/9MTWitN+wuXJ8wTG2+vXX04ZVFeGyQbsXsM8rdWAfN9hPF5PO75kWS\n U1AdFiJa7DcCZlLzx1JrJP7x8RLpn67IEgHoH+NxMrkVmd2ZW8gp57Q5WEyj3SXnaKk8\n aPgQ==","X-Gm-Message-State":"AOJu0YzfFh9/0WB4Y/57xZG8cqHpiIL9HWpS+M1SHLUBKqLNlr5VpDLU\n bVzKmMArqI3zPqjdMni1OeI3PLp1ryElySC4b1o4FEb1oRnmZHsvC+mrp/kwnQuK9Yo=","X-Gm-Gg":"AeBDieuNmNG8zPBB/1WXd4wiGsViaNFMYcHMFTRiEDViZeDKgo1iWM1zaQ/qONCJLpH\n pveERJbs3ZainK1fqkyWyeULV6s4jBL13BNU0j8yab84dfjuN7yiR541/T89phzMDGnvQiZPrFA\n wif6SH7OadG4FvCEh0TgS0SY7YPbQTaHR3cQN8LLPKtv1TRxuTg63WpWWpMudsAWGipN41E24Xo\n U4dtXUK78Ds795z4UpMZL+HIx+9063K72e3TiZMpOKkCB9TU/7MMgeMddHnhxDa9CvR/B1waO+Z\n mLGK7cxxvB1O8aArvdcKtkldHgP8iihmG8f/8TlsNc5EGY2OVLG7RJ9yWXCcaD879OVA2Ot2x8/\n AUCXPN6+hrz1B5kvUEr5RORr960K9hSThTkJJZnp6cC/YsJSs50VhGPm6doZZF5hD6fM5/5a4Ps\n xVBbHt+GnVpegYPnqlrJwgu/LPEi08mE+QkpIYu/RH3wFADSJWJ6a5a3dVv4aFXOseDTOu/pdr4\n j6sHiGEQmO/vAK73LqrerZbcKIdFydS7MTxg6RnYsavR2DwA4Ec407YROnzh7wNmn5IalY0iDtw\n dDkkrg==","X-Received":"by 2002:a05:6808:c2d9:b0:466:f3a2:dc34 with SMTP id\n 5614622812f47-4789f209e29mr2873351b6e.36.1775891221402;\n Sat, 11 Apr 2026 00:07:01 -0700 (PDT)","From":"James Hilliard ","To":"qemu-devel@nongnu.org","Cc":"James Hilliard ,\n Laurent Vivier ,\n Pierrick Bouvier , =?utf-8?q?Philippe_Mathieu-?=\n\t=?utf-8?q?Daud=C3=A9?= ,\n Aurelien Jarno , Jiaxun Yang ,\n Aleksandar Rikalo , Huacai Chen ","Subject":"[PATCH 5/9] target/mips: add Octeon SMS4 crypto support","Date":"Sat, 11 Apr 2026 01:06:31 -0600","Message-ID":"<20260411070637.72421-5-james.hilliard1@gmail.com>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260411070637.72421-1-james.hilliard1@gmail.com>","References":"<20260411070637.72421-1-james.hilliard1@gmail.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2001:4860:4864:20::32;\n envelope-from=james.hilliard1@gmail.com; helo=mail-oa1-x32.google.com","X-Spam_score_int":"-17","X-Spam_score":"-1.8","X-Spam_bar":"-","X-Spam_report":"(-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"On Octeon, the SMS4 engine is exposed through selectors that alias the\nAES register bank. Add the missing selectors and model the shared\nRESULT, IV, and key state so the hardware interface matches the\nprocessor behaviour.\n\nUse the in-tree SM4 tables to implement the block operation without\nadding a host crypto dependency.\n\nSigned-off-by: James Hilliard \n---\n target/mips/cpu.h | 18 +++++\n target/mips/tcg/octeon_crypto.c | 114 ++++++++++++++++++++++++++++++++\n target/mips/tcg/translate.c | 8 +++\n 3 files changed, 140 insertions(+)","diff":"diff --git a/target/mips/cpu.h b/target/mips/cpu.h\nindex b4b7575ecb..28b3e71793 100644\n--- a/target/mips/cpu.h\n+++ b/target/mips/cpu.h\n@@ -593,6 +593,20 @@ typedef enum MIPSOcteonCop2Sel {\n OCTEON_COP2_SEL_AES_DEC0 = 0x010e,\n OCTEON_COP2_SEL_AES_KEYLENGTH = 0x0110,\n OCTEON_COP2_SEL_AES_DAT0 = 0x0111,\n+ /*\n+ * SMS4 reuses the AES result/input, IV, and key banks and only adds\n+ * operation selectors for ECB/CBC encrypt/decrypt.\n+ */\n+ OCTEON_COP2_SEL_SMS4_RESINP0 = OCTEON_COP2_SEL_AES_RESULT0,\n+ OCTEON_COP2_SEL_SMS4_RESINP1 = OCTEON_COP2_SEL_AES_RESULT1,\n+ OCTEON_COP2_SEL_SMS4_IV0 = OCTEON_COP2_SEL_AES_IV0,\n+ OCTEON_COP2_SEL_SMS4_IV1 = OCTEON_COP2_SEL_AES_IV1,\n+ OCTEON_COP2_SEL_SMS4_KEY0 = OCTEON_COP2_SEL_AES_KEY0,\n+ OCTEON_COP2_SEL_SMS4_KEY1 = OCTEON_COP2_SEL_AES_KEY1,\n+ OCTEON_COP2_SEL_SMS4_ENC_CBC0 = OCTEON_COP2_SEL_AES_ENC_CBC0,\n+ OCTEON_COP2_SEL_SMS4_ENC0 = OCTEON_COP2_SEL_AES_ENC0,\n+ OCTEON_COP2_SEL_SMS4_DEC_CBC0 = OCTEON_COP2_SEL_AES_DEC_CBC0,\n+ OCTEON_COP2_SEL_SMS4_DEC0 = OCTEON_COP2_SEL_AES_DEC0,\n OCTEON_COP2_SEL_CRC_POLYNOMIAL = 0x0200,\n OCTEON_COP2_SEL_CRC_IV = 0x0201,\n OCTEON_COP2_SEL_CRC_LEN = 0x0202,\n@@ -661,6 +675,10 @@ typedef enum MIPSOcteonCop2Sel {\n OCTEON_COP2_SEL_AES_ENC1 = 0x310b,\n OCTEON_COP2_SEL_AES_DEC_CBC1 = 0x310d,\n OCTEON_COP2_SEL_AES_DEC1 = 0x310f,\n+ OCTEON_COP2_SEL_SMS4_ENC_CBC1 = 0x3119,\n+ OCTEON_COP2_SEL_SMS4_ENC1 = 0x311b,\n+ OCTEON_COP2_SEL_SMS4_DEC_CBC1 = 0x311d,\n+ OCTEON_COP2_SEL_SMS4_DEC1 = 0x311f,\n OCTEON_COP2_SEL_HSH_STARTMD5 = 0x4047,\n OCTEON_COP2_SEL_SNOW3G_START = 0x404d,\n OCTEON_COP2_SEL_SNOW3G_MORE = 0x404e,\ndiff --git a/target/mips/tcg/octeon_crypto.c b/target/mips/tcg/octeon_crypto.c\nindex a308c3957e..976f6c7ddb 100644\n--- a/target/mips/tcg/octeon_crypto.c\n+++ b/target/mips/tcg/octeon_crypto.c\n@@ -12,6 +12,7 @@\n #include \"exec/helper-proto.h\"\n #include \"exec/memop.h\"\n #include \"crypto/aes.h\"\n+#include \"crypto/sm4.h\"\n #include \"qemu/bitops.h\"\n #include \"qemu/host-utils.h\"\n \n@@ -733,6 +734,57 @@ static int octeon_aes_key_bits(const MIPSOcteonCryptoState *crypto)\n }\n }\n \n+static inline uint32_t octeon_sms4_t(uint32_t x)\n+{\n+ x = sm4_subword(x);\n+ return x ^ rol32(x, 2) ^ rol32(x, 10) ^\n+ rol32(x, 18) ^ rol32(x, 24);\n+}\n+\n+static inline uint32_t octeon_sms4_t_key(uint32_t x)\n+{\n+ x = sm4_subword(x);\n+ return x ^ rol32(x, 13) ^ rol32(x, 23);\n+}\n+\n+static void octeon_sms4_expand_key(const uint8_t *key, uint32_t round_keys[32])\n+{\n+ static const uint32_t fk[4] = {\n+ 0xa3b1bac6U, 0x56aa3350U, 0x677d9197U, 0xb27022dcU,\n+ };\n+ uint32_t k[36];\n+\n+ for (int i = 0; i < 4; i++) {\n+ k[i] = ldl_be_p(key + i * 4) ^ fk[i];\n+ }\n+ for (int i = 0; i < 32; i++) {\n+ k[i + 4] = k[i] ^ octeon_sms4_t_key(k[i + 1] ^ k[i + 2] ^\n+ k[i + 3] ^ sm4_ck[i]);\n+ round_keys[i] = k[i + 4];\n+ }\n+}\n+\n+static void octeon_sms4_crypt_block(const uint8_t *in, uint8_t *out,\n+ const uint32_t round_keys[32],\n+ bool encrypt)\n+{\n+ uint32_t x[36];\n+\n+ for (int i = 0; i < 4; i++) {\n+ x[i] = ldl_be_p(in + i * 4);\n+ }\n+ for (int i = 0; i < 32; i++) {\n+ uint32_t rk = round_keys[encrypt ? i : 31 - i];\n+\n+ x[i + 4] = x[i] ^ octeon_sms4_t(x[i + 1] ^ x[i + 2] ^\n+ x[i + 3] ^ rk);\n+ }\n+ stl_be_p(out, x[35]);\n+ stl_be_p(out + 4, x[34]);\n+ stl_be_p(out + 8, x[33]);\n+ stl_be_p(out + 12, x[32]);\n+}\n+\n static const uint8_t octeon_des_ip[64] = {\n 58, 50, 42, 34, 26, 18, 10, 2,\n 60, 52, 44, 36, 28, 20, 12, 4,\n@@ -1186,6 +1238,47 @@ static void octeon_aes_store_block(uint64_t regs[2], const uint8_t *block)\n regs[1] = ldq_be_p(block + 8);\n }\n \n+static void octeon_sms4_crypt_common(MIPSOcteonCryptoState *crypto,\n+ bool encrypt, bool cbc)\n+{\n+ uint8_t key[16];\n+ uint8_t in[16];\n+ uint8_t out[16];\n+ uint8_t iv[16];\n+ uint8_t next_iv[16];\n+ uint32_t round_keys[32];\n+\n+ /*\n+ * SMS4 aliases the AES state onto the RESULT/RESINP, IV, and KEY banks,\n+ * with only the operation selectors remaining distinct.\n+ */\n+ octeon_aes_load_key(crypto, key, sizeof(key));\n+ octeon_aes_load_block(crypto->aes_input, in);\n+ if (cbc) {\n+ octeon_aes_load_block(crypto->aes_iv, iv);\n+ if (encrypt) {\n+ for (int i = 0; i < sizeof(in); i++) {\n+ in[i] ^= iv[i];\n+ }\n+ } else {\n+ memcpy(next_iv, in, sizeof(next_iv));\n+ }\n+ }\n+\n+ octeon_sms4_expand_key(key, round_keys);\n+ octeon_sms4_crypt_block(in, out, round_keys, encrypt);\n+ if (cbc && !encrypt) {\n+ for (int i = 0; i < sizeof(out); i++) {\n+ out[i] ^= iv[i];\n+ }\n+ }\n+\n+ octeon_aes_store_block(crypto->aes_result, out);\n+ if (cbc) {\n+ octeon_aes_store_block(crypto->aes_iv, encrypt ? out : next_iv);\n+ }\n+}\n+\n static void octeon_aes_encrypt_common(MIPSOcteonCryptoState *crypto, bool cbc)\n {\n AES_KEY key;\n@@ -1424,6 +1517,11 @@ void helper_octeon_cop2_dmtc2(CPUMIPSState *env, target_ulong value,\n case OCTEON_COP2_SEL_3DES_DEC:\n octeon_3des_crypt_common(crypto, q, false, false);\n break;\n+ case OCTEON_COP2_SEL_AES_RESULT0:\n+ case OCTEON_COP2_SEL_AES_RESULT1:\n+ crypto->aes_input[sel - OCTEON_COP2_SEL_AES_RESULT0] = q;\n+ crypto->aes_result[sel - OCTEON_COP2_SEL_AES_RESULT0] = q;\n+ break;\n case OCTEON_COP2_SEL_AES_IV0:\n case OCTEON_COP2_SEL_AES_IV1:\n crypto->aes_iv[sel - OCTEON_COP2_SEL_AES_IV0] = q;\n@@ -1588,6 +1686,22 @@ void helper_octeon_cop2_dmtc2(CPUMIPSState *env, target_ulong value,\n crypto->aes_input[1] = q;\n octeon_aes_decrypt_common(crypto, false);\n break;\n+ case OCTEON_COP2_SEL_SMS4_ENC_CBC1:\n+ crypto->aes_input[1] = q;\n+ octeon_sms4_crypt_common(crypto, true, true);\n+ break;\n+ case OCTEON_COP2_SEL_SMS4_ENC1:\n+ crypto->aes_input[1] = q;\n+ octeon_sms4_crypt_common(crypto, true, false);\n+ break;\n+ case OCTEON_COP2_SEL_SMS4_DEC_CBC1:\n+ crypto->aes_input[1] = q;\n+ octeon_sms4_crypt_common(crypto, false, true);\n+ break;\n+ case OCTEON_COP2_SEL_SMS4_DEC1:\n+ crypto->aes_input[1] = q;\n+ octeon_sms4_crypt_common(crypto, false, false);\n+ break;\n case OCTEON_COP2_SEL_GFM_XORMUL1: {\n uint64_t in[2] = {\n crypto->gfm_result[0] ^ crypto->gfm_xor0,\ndiff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c\nindex 42445e5526..c66cb63cfc 100644\n--- a/target/mips/tcg/translate.c\n+++ b/target/mips/tcg/translate.c\n@@ -9138,6 +9138,8 @@ static bool octeon_cop2_is_supported_dmfc2(uint16_t sel)\n case OCTEON_COP2_SEL_3DES_RESULT_IN:\n case OCTEON_COP2_SEL_AES_RESULT0:\n case OCTEON_COP2_SEL_AES_RESULT1:\n+ case OCTEON_COP2_SEL_AES_KEY0:\n+ case OCTEON_COP2_SEL_AES_KEY1:\n case OCTEON_COP2_SEL_CRC_POLYNOMIAL:\n case OCTEON_COP2_SEL_AES_IV0:\n case OCTEON_COP2_SEL_AES_IV1:\n@@ -9194,6 +9196,8 @@ static bool octeon_cop2_is_supported_dmtc2(uint16_t sel)\n case OCTEON_COP2_SEL_KAS_ENC:\n case OCTEON_COP2_SEL_3DES_DEC_CBC:\n case OCTEON_COP2_SEL_3DES_DEC:\n+ case OCTEON_COP2_SEL_AES_RESULT0:\n+ case OCTEON_COP2_SEL_AES_RESULT1:\n case OCTEON_COP2_SEL_AES_IV0:\n case OCTEON_COP2_SEL_AES_IV1:\n case OCTEON_COP2_SEL_AES_KEY0:\n@@ -9277,6 +9281,10 @@ static bool octeon_cop2_is_supported_dmtc2(uint16_t sel)\n case OCTEON_COP2_SEL_AES_ENC1:\n case OCTEON_COP2_SEL_AES_DEC_CBC1:\n case OCTEON_COP2_SEL_AES_DEC1:\n+ case OCTEON_COP2_SEL_SMS4_ENC_CBC1:\n+ case OCTEON_COP2_SEL_SMS4_ENC1:\n+ case OCTEON_COP2_SEL_SMS4_DEC_CBC1:\n+ case OCTEON_COP2_SEL_SMS4_DEC1:\n return true;\n default:\n return false;\n","prefixes":["5/9"]}