{"id":2222277,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2222277/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260411043051.174309-1-rosenp@gmail.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260411043051.174309-1-rosenp@gmail.com>","date":"2026-04-11T04:30:51","name":"PCI: mvebu: allocate ports with pcie struct","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"abc9d829547695b4951918025bc8167bdc8163e4","submitter":{"id":70304,"url":"http://patchwork.ozlabs.org/api/1.1/people/70304/?format=json","name":"Rosen Penev","email":"rosenp@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260411043051.174309-1-rosenp@gmail.com/mbox/","series":[{"id":499529,"url":"http://patchwork.ozlabs.org/api/1.1/series/499529/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=499529","date":"2026-04-11T04:30:51","name":"PCI: mvebu: allocate ports with pcie struct","version":1,"mbox":"http://patchwork.ozlabs.org/series/499529/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2222277/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2222277/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=EDKfRRC7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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R. Silva\" ,\n linux-arm-kernel@lists.infradead.org (moderated list:PCI DRIVER FOR MVEBU\n (Marvell Armada 370 and Ar...), linux-kernel@vger.kernel.org (open list),\n linux-hardening@vger.kernel.org (open list:KERNEL HARDENING (not covered by\n other areas):Keyword:\\b__counted_by(_le|_be)?\\b)","Subject":"[PATCH] PCI: mvebu: allocate ports with pcie struct","Date":"Fri, 10 Apr 2026 21:30:51 -0700","Message-ID":"<20260411043051.174309-1-rosenp@gmail.com>","X-Mailer":"git-send-email 2.53.0","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit"},"content":"Use a flexible array member to combine allocations and simplify\nslightly.\n\nAdd __counted_by for extra runtime analysis.\n\nNeeded to move mvebu_pcie struct below others as flexible array members\nrequire full definitions.\n\nSigned-off-by: Rosen Penev \n---\n drivers/pci/controller/pci-mvebu.c | 33 ++++++++++++------------------\n 1 file changed, 13 insertions(+), 20 deletions(-)","diff":"diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c\nindex a72aa57591c0..dea50f6e88be 100644\n--- a/drivers/pci/controller/pci-mvebu.c\n+++ b/drivers/pci/controller/pci-mvebu.c\n@@ -78,18 +78,6 @@\n #define PCIE_DEBUG_CTRL 0x1a60\n #define PCIE_DEBUG_SOFT_RESET\t\tBIT(20)\n \n-struct mvebu_pcie_port;\n-\n-/* Structure representing all PCIe interfaces */\n-struct mvebu_pcie {\n-\tstruct platform_device *pdev;\n-\tstruct mvebu_pcie_port *ports;\n-\tstruct resource io;\n-\tstruct resource realio;\n-\tstruct resource mem;\n-\tint nports;\n-};\n-\n struct mvebu_pcie_window {\n \tphys_addr_t base;\n \tphys_addr_t remap;\n@@ -125,6 +113,16 @@ struct mvebu_pcie_port {\n \tint intx_irq;\n };\n \n+/* Structure representing all PCIe interfaces */\n+struct mvebu_pcie {\n+\tstruct platform_device *pdev;\n+\tstruct resource io;\n+\tstruct resource realio;\n+\tstruct resource mem;\n+\tint nports;\n+\tstruct mvebu_pcie_port ports[] __counted_by(nports);\n+};\n+\n static inline void mvebu_writel(struct mvebu_pcie_port *port, u32 val, u32 reg)\n {\n \twritel(val, port->base + reg);\n@@ -1455,11 +1453,13 @@ static int mvebu_pcie_probe(struct platform_device *pdev)\n \tstruct device_node *child;\n \tint num, i, ret;\n \n-\tbridge = devm_pci_alloc_host_bridge(dev, sizeof(struct mvebu_pcie));\n+\tnum = of_get_available_child_count(np);\n+\tbridge = devm_pci_alloc_host_bridge(dev, struct_size(pcie, ports, num));\n \tif (!bridge)\n \t\treturn -ENOMEM;\n \n \tpcie = pci_host_bridge_priv(bridge);\n+\tpcie->nports = num;\n \tpcie->pdev = pdev;\n \tplatform_set_drvdata(pdev, pcie);\n \n@@ -1467,12 +1467,6 @@ static int mvebu_pcie_probe(struct platform_device *pdev)\n \tif (ret)\n \t\treturn ret;\n \n-\tnum = of_get_available_child_count(np);\n-\n-\tpcie->ports = devm_kcalloc(dev, num, sizeof(*pcie->ports), GFP_KERNEL);\n-\tif (!pcie->ports)\n-\t\treturn -ENOMEM;\n-\n \ti = 0;\n \tfor_each_available_child_of_node(np, child) {\n \t\tstruct mvebu_pcie_port *port = &pcie->ports[i];\n@@ -1488,7 +1482,6 @@ static int mvebu_pcie_probe(struct platform_device *pdev)\n \t\tport->dn = child;\n \t\ti++;\n \t}\n-\tpcie->nports = i;\n \n \tfor (i = 0; i < pcie->nports; i++) {\n \t\tstruct mvebu_pcie_port *port = &pcie->ports[i];\n","prefixes":[]}