{"id":2221756,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2221756/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260410093018.1461732-3-pranav.vinaytilak@amd.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260410093018.1461732-3-pranav.vinaytilak@amd.com>","date":"2026-04-10T09:30:17","name":"[2/3] net: zynq_gem: set 128-bit AXI bus width for 10GBE","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"c8c6b3b3c7c557646e1f6f33e9f1c41c864172f2","submitter":{"id":92380,"url":"http://patchwork.ozlabs.org/api/1.1/people/92380/?format=json","name":"Pranav Tilak","email":"pranav.vinaytilak@amd.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260410093018.1461732-3-pranav.vinaytilak@amd.com/mbox/","series":[{"id":499433,"url":"http://patchwork.ozlabs.org/api/1.1/series/499433/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=499433","date":"2026-04-10T09:30:17","name":"fix 10GBE support for AMD Versal Gen 2","version":1,"mbox":"http://patchwork.ozlabs.org/series/499433/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221756/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221756/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=amd.com header.i=@amd.com header.a=rsa-sha256\n header.s=selector1 header.b=tmTmreUB;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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Ip=[165.204.84.17];\n Helo=[satlexmb07.amd.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n BL6PEPF0001AB78.namprd02.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DM4PR12MB7528","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Set 128-bit AXI bus width in network config for 10GBE. The default 64-bit\nsetting causes DMA data corruption.\n\nSigned-off-by: Pranav Tilak \n---\n drivers/net/zynq_gem.c | 5 +++++\n 1 file changed, 5 insertions(+)","diff":"diff --git a/drivers/net/zynq_gem.c b/drivers/net/zynq_gem.c\nindex c06d114af68..e9210d42438 100644\n--- a/drivers/net/zynq_gem.c\n+++ b/drivers/net/zynq_gem.c\n@@ -69,10 +69,13 @@\n #define ZYNQ_GEM_NWCFG_SGMII_ENBL\t0x08000000 /* SGMII Enable */\n #define ZYNQ_GEM_NWCFG_PCS_SEL\t\t0x00000800 /* PCS select */\n \n+#define ZYNQ_GEM_DBUS_WIDTH_MASK\t(3 << 21) /* bits 22:21 */\n #ifdef CONFIG_ARM64\n # define ZYNQ_GEM_DBUS_WIDTH\t(1 << 21) /* 64 bit bus */\n+# define ZYNQ_GEM_DBUS_WIDTH_128\t(2 << 21) /* 128 bit bus */\n #else\n # define ZYNQ_GEM_DBUS_WIDTH\t(0 << 21) /* 32 bit bus */\n+# define ZYNQ_GEM_DBUS_WIDTH_128\t(0 << 21) /* 32 bit bus */\n #endif\n \n #define ZYNQ_GEM_NWCFG_INIT\t\t(ZYNQ_GEM_DBUS_WIDTH | \\\n@@ -533,6 +536,8 @@ static int zynq_gem_init(struct udevice *dev)\n \tnwconfig = ZYNQ_GEM_NWCFG_INIT;\n \n \tif (device_is_compatible(dev, \"amd,versal2-10gbe\")) {\n+\t\tnwconfig &= ~ZYNQ_GEM_DBUS_WIDTH_MASK;\n+\t\tnwconfig |= ZYNQ_GEM_DBUS_WIDTH_128;\n \t\tif (priv->interface == PHY_INTERFACE_MODE_10GBASER) {\n \t\t\tctrl = readl(®s->nwcfg);\n \t\t\tctrl |= PCSSEL;\n","prefixes":["2/3"]}