{"id":2221607,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2221607/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260409235122.436749-3-grzegorz.nitka@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.1/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260409235122.436749-3-grzegorz.nitka@intel.com>","date":"2026-04-09T23:51:16","name":"[v6,net-next,2/8] dpll: allow registering FW-identified pin with a different DPLL","commit_ref":null,"pull_url":null,"state":"handled-elsewhere","archived":false,"hash":"ccb4649b3fd3608dfba7bf38c03d13ac5b128f01","submitter":{"id":82711,"url":"http://patchwork.ozlabs.org/api/1.1/people/82711/?format=json","name":"Nitka, Grzegorz","email":"grzegorz.nitka@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260409235122.436749-3-grzegorz.nitka@intel.com/mbox/","series":[{"id":499370,"url":"http://patchwork.ozlabs.org/api/1.1/series/499370/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=499370","date":"2026-04-09T23:51:14","name":"dpll/ice: Add TXC DPLL type and full TX reference clock control for E825","version":6,"mbox":"http://patchwork.ozlabs.org/series/499370/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221607/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221607/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=8qBM13hq;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.137; 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a=\"87424056\"","E=Sophos;i=\"6.23,170,1770624000\"; d=\"scan'208\";a=\"87424056\"","E=Sophos;i=\"6.23,170,1770624000\"; d=\"scan'208\";a=\"228860026\""],"X-ExtLoop1":"1","From":"Grzegorz Nitka ","To":"netdev@vger.kernel.org","Date":"Fri, 10 Apr 2026 01:51:16 +0200","Message-Id":"<20260409235122.436749-3-grzegorz.nitka@intel.com>","X-Mailer":"git-send-email 2.39.3","In-Reply-To":"<20260409235122.436749-1-grzegorz.nitka@intel.com>","References":"<20260409235122.436749-1-grzegorz.nitka@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775778917; x=1807314917;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=/HBM1v6M04Z+Jc0mYsEibM5D9jaupGjKj8gDCUGJ9xY=;\n b=iKaBHHGbIxW1yz+DRccjtU56FBmbcAUHdjy3y4sk6eNZ3CMZ1uNSMCb1\n L6U3Os6ZBr85JFNmg4TplA55tALiCLDrfxE7LLYvlVCg18zJPCOcte6uB\n Q/vbGuHuazHMFP+y+7rNmapqv+jZGY0PNRp9yt9G9jxjbcVUzDuV5V5pZ\n i87zW325L0j3XNCdkEno3EaWHNGPB6x4s3TzaB2ESWi1bkID9DkwyUu7g\n uO5EGEaya7ezbNMFzdtrzBAJk/i/uXM1fbVBW5WD7YkwkXNbRGwD6Fl5l\n UG474rZk+dhfkKz3xOcT+in/p7tU6nduj/PQ+d8rC2rHxyl3QVfLWoCjJ\n w==;","X-Mailman-Original-Authentication-Results":["smtp4.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp4.osuosl.org;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.a=rsa-sha256 header.s=Intel header.b=iKaBHHGb"],"Subject":"[Intel-wired-lan] [PATCH v6 net-next 2/8] dpll: allow registering\n FW-identified pin with a different DPLL","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Cc":"ivecera@redhat.com, vadim.fedorenko@linux.dev, kuba@kernel.org,\n jiri@resnulli.us, edumazet@google.com, przemyslaw.kitszel@intel.com,\n richardcochran@gmail.com, donald.hunter@gmail.com,\n linux-kernel@vger.kernel.org, arkadiusz.kubalewski@intel.com,\n Aleksandr Loktionov , andrew+netdev@lunn.ch,\n intel-wired-lan@lists.osuosl.org, horms@kernel.org,\n Prathosh.Satish@microchip.com, anthony.l.nguyen@intel.com, pabeni@redhat.com,\n davem@davemloft.net, Jiri Pirko ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"Relax the (module, clock_id) equality requirement when registering a\npin identified by firmware (pin->fwnode). Some platforms associate a\nFW-described pin with a DPLL instance that differs from the pin's\n(module, clock_id) tuple. For such pins, permit registration without\nrequiring the strict match. Non-FW pins still require equality.\n\nReviewed-by: Jiri Pirko \nReviewed-by: Arkadiusz Kubalewski \nReviewed-by: Aleksandr Loktionov \nSigned-off-by: Grzegorz Nitka \n---\n drivers/dpll/dpll_core.c | 18 ++++++++++++++----\n 1 file changed, 14 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/dpll/dpll_core.c b/drivers/dpll/dpll_core.c\nindex cbb635db4321..afe4552bdcd4 100644\n--- a/drivers/dpll/dpll_core.c\n+++ b/drivers/dpll/dpll_core.c\n@@ -883,11 +883,21 @@ dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,\n \t\treturn -EINVAL;\n \n \tmutex_lock(&dpll_lock);\n-\tif (WARN_ON(!(dpll->module == pin->module &&\n-\t\t dpll->clock_id == pin->clock_id)))\n+\n+\t/*\n+\t * For pins identified via firmware (pin->fwnode), allow registration\n+\t * even if the pin's (module, clock_id) differs from the target DPLL.\n+\t * For non-fwnode pins, require a strict (module, clock_id) match.\n+\t */\n+\tif (!pin->fwnode &&\n+\t WARN_ON_ONCE(dpll->module != pin->module ||\n+\t\t\t dpll->clock_id != pin->clock_id)) {\n \t\tret = -EINVAL;\n-\telse\n-\t\tret = __dpll_pin_register(dpll, pin, ops, priv, NULL);\n+\t\tgoto out_unlock;\n+\t}\n+\n+\tret = __dpll_pin_register(dpll, pin, ops, priv, NULL);\n+out_unlock:\n \tmutex_unlock(&dpll_lock);\n \n \treturn ret;\n","prefixes":["v6","net-next","2/8"]}