{"id":2221155,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2221155/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260408105605.172465-2-mjt@tls.msk.ru/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260408105605.172465-2-mjt@tls.msk.ru>","date":"2026-04-08T10:55:56","name":"[PULL,1/3] util/meson.build: do not add cpuinfo-$arch to util_ss for 32bit CPUs","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"e0c2f98fd4b5fbf074ce122d898efd3a480d5421","submitter":{"id":183,"url":"http://patchwork.ozlabs.org/api/1.1/people/183/?format=json","name":"Michael Tokarev","email":"mjt@tls.msk.ru"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260408105605.172465-2-mjt@tls.msk.ru/mbox/","series":[{"id":499181,"url":"http://patchwork.ozlabs.org/api/1.1/series/499181/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499181","date":"2026-04-08T10:55:57","name":"[PULL,1/3] util/meson.build: do not add cpuinfo-$arch to util_ss for 32bit CPUs","version":1,"mbox":"http://patchwork.ozlabs.org/series/499181/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221155/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221155/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=tls.msk.ru header.i=@tls.msk.ru header.a=rsa-sha256\n header.s=202602 header.b=aJlye7Ij;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4frY7g1Vwfz1xv0\n\tfor ; Thu, 09 Apr 2026 05:30:39 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wAYWn-0000bG-5Y; Wed, 08 Apr 2026 15:25:29 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wAY7B-0007Zo-4N; Wed, 08 Apr 2026 14:59:02 -0400","from isrv.corpit.ru ([212.248.84.144])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wAQbr-0007V2-Ki; Wed, 08 Apr 2026 06:58:14 -0400","from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2])\n by isrv.corpit.ru (Postfix) with ESMTP id 02D9F19C29B;\n Wed, 08 Apr 2026 13:55:20 +0300 (MSK)","from think4mjt.tls.msk.ru (mjtthink.wg.tls.msk.ru [192.168.177.146])\n by tsrv.corpit.ru (Postfix) with ESMTP id 4A611391675;\n Wed, 08 Apr 2026 13:56:07 +0300 (MSK)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=tls.msk.ru; s=202602;\n t=1775645720; bh=H+2pTqaUl/6Ak+h++0EIERck35CzchelOqdLg6r0wGM=;\n h=From:To:Cc:Subject:Date:In-Reply-To:References;\n b=aJlye7IjmWHRa8kKuZpQTArJp2G4PmDlNnxnhmnKMYHNRetjXXkOmnfwob13gkDPz\n IQRIUqOyxWXUkjmHmI/sf1XFdBuGCRTMupA67GxVgx/d9DMpq1BkFBADdnbhpBarcl\n ixEdCN7l3ze8B+t56gFUgTIPYseV2I/VCndsWYzvTj1Z7LyNuuUjeHN8qwMONIn+jy\n 8TJnM9OxYonTq7aYwHBJ7IphFBI0MdaWYIyiNkGNPI85voHXEf32VfU5cUk/3Dl6m5\n fiTAwjLbV7tA8SybYHRXLsIB5Gsrg1b7aBiApYuEm/39KMRZxx0sPzupWgyWP4JzxL\n 6Z0tFQyFOsOUw==","From":"Michael Tokarev ","To":"qemu-devel@nongnu.org","Cc":"Michael Tokarev , qemu-trivial@nongnu.org, =?utf-8?q?Phi?=\n\t=?utf-8?q?lippe_Mathieu-Daud=C3=A9?= ","Subject":"[PULL 1/3] util/meson.build: do not add cpuinfo-$arch to util_ss for\n 32bit CPUs","Date":"Wed, 8 Apr 2026 13:55:56 +0300","Message-ID":"<20260408105605.172465-2-mjt@tls.msk.ru>","X-Mailer":"git-send-email 2.47.3","In-Reply-To":"<20260408105605.172465-1-mjt@tls.msk.ru>","References":"<20260408105605.172465-1-mjt@tls.msk.ru>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=212.248.84.144; envelope-from=mjt@tls.msk.ru;\n helo=isrv.corpit.ru","X-Spam_score_int":"-19","X-Spam_score":"-2.0","X-Spam_bar":"--","X-Spam_report":"(-2.0 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"qemu dropped support for 32bit CPUs recently, so this change is an\nadditional clean-up on top. But in theory it will allow building\nqemu-guest-agent on a 32bit system.\n\nReviewed-by: Philippe Mathieu-Daudé \nSigned-off-by: Michael Tokarev \n---\n util/meson.build | 6 +++---\n 1 file changed, 3 insertions(+), 3 deletions(-)","diff":"diff --git a/util/meson.build b/util/meson.build\nindex 33132c04ad..c2d77bf9de 100644\n--- a/util/meson.build\n+++ b/util/meson.build\n@@ -116,13 +116,13 @@ endif\n \n if cpu == 'aarch64'\n util_ss.add(files('cpuinfo-aarch64.c'))\n-elif cpu in ['x86', 'x86_64']\n+elif cpu == 'x86_64'\n util_ss.add(files('cpuinfo-i386.c'))\n elif cpu == 'loongarch64'\n util_ss.add(files('cpuinfo-loongarch.c'))\n-elif cpu in ['ppc', 'ppc64']\n+elif cpu == 'ppc64'\n util_ss.add(files('cpuinfo-ppc.c'))\n-elif cpu in ['riscv32', 'riscv64']\n+elif cpu == 'riscv64'\n util_ss.add(files('cpuinfo-riscv.c'))\n elif cpu == 's390x'\n util_ss.add(files('s390x_pci_mmio.c'))\n","prefixes":["PULL","1/3"]}