{"id":2221104,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2221104/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260407215900.63390-3-philmd@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260407215900.63390-3-philmd@linaro.org>","date":"2026-04-07T21:58:56","name":"[PATCH-for-11.0,2/6] cirrus-vga: Make frame buffer endianness little endian by default","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"87c843e0cdd05d76a2ab78820bb9c4eec18a435f","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.1/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260407215900.63390-3-philmd@linaro.org/mbox/","series":[{"id":499182,"url":"http://patchwork.ozlabs.org/api/1.1/series/499182/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=499182","date":"2026-04-07T21:58:54","name":"[PATCH-for-11.0,1/6] docs/about/removed-features: Replace 'since' -> 'removed in'","version":1,"mbox":"http://patchwork.ozlabs.org/series/499182/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2221104/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221104/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=k90MApkp;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32c;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: BALATON Zoltan \n\nQEMU VGA defaults to target endianness but real Cirrus VGA is little\nendian so set it explicitly in cirrus_init_common() to fix it on big\nendian machines.\n\nSigned-off-by: BALATON Zoltan \nReviewed-by: Philippe Mathieu-Daudé \nMessage-ID: <20260401205327.914905969EC@zero.eik.bme.hu>\nSigned-off-by: Philippe Mathieu-Daudé \n---\n hw/display/cirrus_vga.c | 2 ++\n 1 file changed, 2 insertions(+)","diff":"diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c\nindex 629b34fc68d..48be3c8a932 100644\n--- a/hw/display/cirrus_vga.c\n+++ b/hw/display/cirrus_vga.c\n@@ -2930,6 +2930,8 @@ void cirrus_init_common(CirrusVGAState *s, Object *owner,\n s->vga.cursor_invalidate = cirrus_cursor_invalidate;\n s->vga.cursor_draw_line = cirrus_cursor_draw_line;\n \n+ s->vga.big_endian_fb = false;\n+\n qemu_register_reset(cirrus_reset, s);\n }\n \n","prefixes":["PATCH-for-11.0","2/6"]}