{"id":2220960,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220960/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260408131216.2662245-5-aleksandr.loktionov@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.1/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260408131216.2662245-5-aleksandr.loktionov@intel.com>","date":"2026-04-08T13:12:12","name":"[iwl-next,v2,4/8] ixgbe: add IXGBE_ITR_ADAPTIVE_MASK_USECS constant","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"78d650f3bce65fc90fceb035855b84af6f331997","submitter":{"id":75597,"url":"http://patchwork.ozlabs.org/api/1.1/people/75597/?format=json","name":"Loktionov, Aleksandr","email":"aleksandr.loktionov@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260408131216.2662245-5-aleksandr.loktionov@intel.com/mbox/","series":[{"id":499140,"url":"http://patchwork.ozlabs.org/api/1.1/series/499140/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=499140","date":"2026-04-08T13:12:08","name":"ixgbe: nits and improvements","version":2,"mbox":"http://patchwork.ozlabs.org/series/499140/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220960/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220960/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=7R0gt1VO;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::136; 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a=\"102087271\"","E=Sophos;i=\"6.23,167,1770624000\"; d=\"scan'208\";a=\"102087271\"","E=Sophos;i=\"6.23,167,1770624000\"; d=\"scan'208\";a=\"228715090\""],"X-ExtLoop1":"1","From":"Aleksandr Loktionov ","To":"intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com,\n aleksandr.loktionov@intel.com","Cc":"netdev@vger.kernel.org","Date":"Wed, 8 Apr 2026 15:12:12 +0200","Message-ID":"<20260408131216.2662245-5-aleksandr.loktionov@intel.com>","X-Mailer":"git-send-email 2.52.0","In-Reply-To":"<20260408131216.2662245-1-aleksandr.loktionov@intel.com>","References":"<20260408131216.2662245-1-aleksandr.loktionov@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775653945; x=1807189945;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=BWYev73HaJSnzrEAnlgrwJYbkkFT02+lBiRDnD08l2M=;\n b=YzrdjmExP+7QwpMcjQRUyzJ3u9mHQzobrCIGAcHUoYzbAU+45mN3JZs3\n XCKyIx/GdkDOkf78I80vbyCMkgPeJ+2VJWWl7bMmgzsReltQEfa5kkMhS\n IXMcjs2YD5sXRsQokvJOyBElFCwm35GoyP5aLeqL2p4ECsmlRrepw4sum\n pdQDJ0hwkpbPcqyGe3qIkHZCxCqnDy7y3fba5Dfba4GZOhIkmFeN5UvSr\n riZlYYCAEbYO2z0TfwcHm+0U6ZA+yPyqn1B/ImTR5kTw4n0XcCYlDktHr\n YofOMCnV3exBn3+G6QKOnlcp9SHnE4uAfDCHOlF4TifkIfOkgdzUY1voN\n A==;","X-Mailman-Original-Authentication-Results":["smtp4.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp4.osuosl.org;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.a=rsa-sha256 header.s=Intel header.b=YzrdjmEx"],"Subject":"[Intel-wired-lan] [PATCH iwl-next v2 4/8] ixgbe: add\n IXGBE_ITR_ADAPTIVE_MASK_USECS constant","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" "},"content":"From: Alexander Duyck \n\nixgbe_set_itr() clears the mode flag (IXGBE_ITR_ADAPTIVE_LATENCY, bit 7)\nwith the open-coded complement expression ~IXGBE_ITR_ADAPTIVE_LATENCY.\nThis is equivalent to keeping only bits [6:0], i.e. the usecs sub-field.\n\nAdd IXGBE_ITR_ADAPTIVE_MASK_USECS = IXGBE_ITR_ADAPTIVE_LATENCY - 1 =\n0x7F to name this mask explicitly and replace the open-coded AND-NOT\noperation with the cleaner AND form. The two expressions are\narithmetically identical; the change improves readability.\n\nSigned-off-by: Alexander Duyck \nSigned-off-by: Aleksandr Loktionov \n---\nv1 -> v2:\n - Split from monolithic ITR cleanup; this patch only adds the\n IXGBE_ITR_ADAPTIVE_MASK_USECS constant and updates ixgbe_set_itr().\n\n drivers/net/ethernet/intel/ixgbe/ixgbe.h | 1 +\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 2 +-\n 2 files changed, 2 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\nindex b3f4d21..c704cc6 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h\n@@ -475,6 +475,7 @@ static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring)\n #define IXGBE_ITR_ADAPTIVE_MAX_USECS\t84\n #define IXGBE_ITR_ADAPTIVE_LATENCY\t0x80\n #define IXGBE_ITR_ADAPTIVE_BULK\t\t0x00\n+#define IXGBE_ITR_ADAPTIVE_MASK_USECS\t(IXGBE_ITR_ADAPTIVE_LATENCY - 1)\n \n struct ixgbe_ring_container {\n \tstruct ixgbe_ring *ring;\t/* pointer to linked list of rings */\n\ndiff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex d7c5e83..1885fe8 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -2960,7 +2960,7 @@ static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)\n \tnew_itr = min(q_vector->rx.itr, q_vector->tx.itr);\n \n \t/* Clear latency flag if set, shift into correct position */\n-\tnew_itr &= ~IXGBE_ITR_ADAPTIVE_LATENCY;\n+\tnew_itr &= IXGBE_ITR_ADAPTIVE_MASK_USECS;\n \tnew_itr <<= 2;\n \n \tif (new_itr != q_vector->itr) {\n","prefixes":["iwl-next","v2","4/8"]}