{"id":2220959,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220959/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260408131216.2662245-3-aleksandr.loktionov@intel.com/","project":{"id":46,"url":"http://patchwork.ozlabs.org/api/1.1/projects/46/?format=json","name":"Intel Wired Ethernet development","link_name":"intel-wired-lan","list_id":"intel-wired-lan.osuosl.org","list_email":"intel-wired-lan@osuosl.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260408131216.2662245-3-aleksandr.loktionov@intel.com>","date":"2026-04-08T13:12:10","name":"[iwl-next,v2,2/8] ixgbe: add ixgbe_container_is_rx() helper and refine RX adaptive ITR","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"38b740d2b3f8f5d394bda1f5293359ae387f1983","submitter":{"id":75597,"url":"http://patchwork.ozlabs.org/api/1.1/people/75597/?format=json","name":"Loktionov, Aleksandr","email":"aleksandr.loktionov@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260408131216.2662245-3-aleksandr.loktionov@intel.com/mbox/","series":[{"id":499140,"url":"http://patchwork.ozlabs.org/api/1.1/series/499140/?format=json","web_url":"http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=499140","date":"2026-04-08T13:12:08","name":"ixgbe: nits and improvements","version":2,"mbox":"http://patchwork.ozlabs.org/series/499140/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220959/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220959/checks/","tags":{},"headers":{"Return-Path":"<intel-wired-lan-bounces@osuosl.org>","X-Original-To":["incoming@patchwork.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","intel-wired-lan@lists.osuosl.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=AxkRADV3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.137; 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a=\"102087266\"","E=Sophos;i=\"6.23,167,1770624000\"; d=\"scan'208\";a=\"102087266\"","E=Sophos;i=\"6.23,167,1770624000\"; d=\"scan'208\";a=\"228715067\""],"X-ExtLoop1":"1","From":"Aleksandr Loktionov <aleksandr.loktionov@intel.com>","To":"intel-wired-lan@lists.osuosl.org, anthony.l.nguyen@intel.com,\n aleksandr.loktionov@intel.com","Cc":"netdev@vger.kernel.org","Date":"Wed,  8 Apr 2026 15:12:10 +0200","Message-ID":"<20260408131216.2662245-3-aleksandr.loktionov@intel.com>","X-Mailer":"git-send-email 2.52.0","In-Reply-To":"<20260408131216.2662245-1-aleksandr.loktionov@intel.com>","References":"<20260408131216.2662245-1-aleksandr.loktionov@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Mailman-Original-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775653942; x=1807189942;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=NsFed1BMzi8mDUXmdE+O4/QmMu76Gjnt+b/Lg5uQ3jU=;\n b=Hq04d9OwgBjTMqO75Ka7BrmxY74evjKbR+qzN1N/RHQoDRpfS2fPDv0D\n m8i5RwRhmPeB9GLqg0Td2pzJjBhc94/c+GSc2xTPNuE8AZye0K+NhqEVB\n 6A98ylZNEpsQDlaXtYznn8+HG9+etwCh5/PfNrtKtmtPlLCO4dU6XFseF\n 41RsinZb8qYtycUHE/uF64lbnmkW0xQ3Av3P0fL0y8A2Un1ZmB8vJcNQg\n 6U3Dvugk3TldCMBhf/2FN+wVEfmlWRwlhlrG27RpBwf6/XACJrjwJNUQH\n /kvwtaHJA/b3+pR35euTdgLOOoEzqrhz0ON5fDFKE6L972/WqAGMk4y5j\n w==;","X-Mailman-Original-Authentication-Results":["smtp4.osuosl.org;\n dmarc=pass (p=none dis=none)\n header.from=intel.com","smtp4.osuosl.org;\n dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com\n header.a=rsa-sha256 header.s=Intel header.b=Hq04d9Ow"],"Subject":"[Intel-wired-lan] [PATCH iwl-next v2 2/8] ixgbe: add\n ixgbe_container_is_rx() helper and refine RX adaptive ITR","X-BeenThere":"intel-wired-lan@osuosl.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>","List-Unsubscribe":"<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>","List-Archive":"<http://lists.osuosl.org/pipermail/intel-wired-lan/>","List-Post":"<mailto:intel-wired-lan@osuosl.org>","List-Help":"<mailto:intel-wired-lan-request@osuosl.org?subject=help>","List-Subscribe":"<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>","Errors-To":"intel-wired-lan-bounces@osuosl.org","Sender":"\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>"},"content":"From: Alexander Duyck <alexander.h.duyck@intel.com>\n\nAdd an ixgbe_container_is_rx() helper to cleanly distinguish RX from TX\nring containers inside ixgbe_update_itr().\n\nRefine the RX-specific latency-detection path:\n\n - Replace the shared \"packets < 4 or bytes < 9000\" threshold with an\n   RX-specific check of \"1..23 packets and bytes < 12112\".  When that\n   condition holds, target 8x the observed byte count in the next\n   interval by computing avg_wire_size = (bytes + packets * 24) * 2,\n   clamped to [2560, 12800], and jumping directly to the speed-based\n   ITR calculation.  This provides finer-grained control over low-rate\n   RX latency workloads without affecting TX.\n\n - Remove the separate \"no packets\" special-case block.  When packets\n   is 0 it falls into the \"< 48\" branch.  The mode-tracking logic in\n   that branch is extended: fewer than 8 packets forces latency mode;\n   8..47 packets preserves the current mode.  This replaces the old\n   unconditional \"add LATENCY flag from ring_container->itr\" carried\n   over from the removed block.\n\n - Remove the adjust_by_size label and the associated \"halve\n   avg_wire_size in latency mode\" step.  The Rx latency path now\n   pre-calculates avg_wire_size independently and the bulk path no\n   longer needs the halving to compensate for incorrect thresholds.\n   Rename the jump target to adjust_for_speed to reflect its purpose.\n\nSigned-off-by: Alexander Duyck <alexander.h.duyck@intel.com>\nSigned-off-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com>\n---\nv1 -> v2:\n - Split from monolithic ITR cleanup; adds ixgbe_container_is_rx(),\n   refines RX latency thresholds (24 pkts / 12112 B), and removes the\n   separate no-packet and adjust_by_size code paths.\n\n drivers/net/ethernet/intel/ixgbe/ixgbe_main.c | 72 ++++++++++--------\n 1 file changed, 41 insertions(+), 31 deletions(-)","diff":"diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\nindex 210c7b9..b3f4a72 100644\n--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c\n@@ -2711,6 +2711,12 @@ static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)\n \tIXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC, mask);\n }\n \n+static bool ixgbe_container_is_rx(struct ixgbe_q_vector *q_vector,\n+\t\t\t\t  struct ixgbe_ring_container *rc)\n+{\n+\treturn &q_vector->rx == rc;\n+}\n+\n /**\n  * ixgbe_update_itr - update the dynamic ITR value based on statistics\n  * @q_vector: structure containing interrupt and ring information\n@@ -2747,35 +2753,24 @@ static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,\n \t\tgoto clear_counts;\n \n \tpackets = ring_container->total_packets;\n-\n-\t/* We have no packets to actually measure against. This means\n-\t * either one of the other queues on this vector is active or\n-\t * we are a Tx queue doing TSO with too high of an interrupt rate.\n-\t *\n-\t * When this occurs just tick up our delay by the minimum value\n-\t * and hope that this extra delay will prevent us from being called\n-\t * without any work on our queue.\n-\t */\n-\tif (!packets) {\n-\t\titr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;\n-\t\tif (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)\n-\t\t\titr = IXGBE_ITR_ADAPTIVE_MAX_USECS;\n-\t\titr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;\n-\t\tgoto clear_counts;\n-\t}\n-\n \tbytes = ring_container->total_bytes;\n \n-\t/* If packets are less than 4 or bytes are less than 9000 assume\n-\t * insufficient data to use bulk rate limiting approach. We are\n-\t * likely latency driven.\n-\t */\n-\tif (packets < 4 && bytes < 9000) {\n-\t\titr = IXGBE_ITR_ADAPTIVE_LATENCY;\n-\t\tgoto adjust_by_size;\n+\tif (ixgbe_container_is_rx(q_vector, ring_container)) {\n+\t\t/* If Rx and there are 1 to 23 packets and bytes are less than\n+\t\t * 12112 assume insufficient data to use bulk rate limiting\n+\t\t * approach. Instead we will focus on simply trying to target\n+\t\t * receiving 8 times as much data in the next interrupt.\n+\t\t */\n+\t\tif (packets && packets < 24 && bytes < 12112) {\n+\t\t\titr = IXGBE_ITR_ADAPTIVE_LATENCY;\n+\t\t\tavg_wire_size = (bytes + packets * 24) * 2;\n+\t\t\tavg_wire_size = clamp_t(unsigned int,\n+\t\t\t\t\t\tavg_wire_size, 2560, 12800);\n+\t\t\tgoto adjust_for_speed;\n+\t\t}\n \t}\n \n-\t/* Between 4 and 48 we can assume that our current interrupt delay\n+\t/* Less than 48 packets we can assume that our current interrupt delay\n \t * is only slightly too low. As such we should increase it by a small\n \t * fixed amount.\n \t */\n@@ -2783,6 +2778,20 @@ static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,\n \t\titr = (q_vector->itr >> 2) + IXGBE_ITR_ADAPTIVE_MIN_INC;\n \t\tif (itr > IXGBE_ITR_ADAPTIVE_MAX_USECS)\n \t\t\titr = IXGBE_ITR_ADAPTIVE_MAX_USECS;\n+\n+\t\t/* If sample size is 0 - 7 we should probably switch\n+\t\t * to latency mode instead of trying to control\n+\t\t * things as though we are in bulk.\n+\t\t *\n+\t\t * Otherwise if the number of packets is less than 48\n+\t\t * we should maintain whatever mode we are currently\n+\t\t * in. The range between 8 and 48 is the cross-over\n+\t\t * point between latency and bulk traffic.\n+\t\t */\n+\t\tif (packets < 8)\n+\t\t\titr += IXGBE_ITR_ADAPTIVE_LATENCY;\n+\t\telse\n+\t\t\titr += ring_container->itr & IXGBE_ITR_ADAPTIVE_LATENCY;\n \t\tgoto clear_counts;\n \t}\n \n@@ -2813,7 +2822,6 @@ static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,\n \t */\n \titr = IXGBE_ITR_ADAPTIVE_BULK;\n \n-adjust_by_size:\n \t/* If packet counts are 256 or greater we can assume we have a gross\n \t * overestimation of what the rate should be. Instead of trying to fine\n \t * tune it just use the formula below to try and dial in an exact value\n@@ -2856,12 +2864,7 @@ static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,\n \t\tavg_wire_size = 32256;\n \t}\n \n-\t/* If we are in low latency mode half our delay which doubles the rate\n-\t * to somewhere between 100K to 16K ints/sec\n-\t */\n-\tif (itr & IXGBE_ITR_ADAPTIVE_LATENCY)\n-\t\tavg_wire_size >>= 1;\n-\n+adjust_for_speed:\n \t/* Resultant value is 256 times larger than it needs to be. This\n \t * gives us room to adjust the value as needed to either increase\n \t * or decrease the value based on link speeds of 10G, 2.5G, 1G, etc.\n","prefixes":["iwl-next","v2","2/8"]}