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eACzm9sJklTyM+v5LGLWAFRvBBSLSIwgNNr2RU3mDetWuVbbmDufBhg7TE3LQKJbWYdZy+owQruQLLjSZdOEHlHMowBYtXgRidl72+yYh3G0zgxu21zSNjlMEnLzuHQ4+JZvpX1OCHlzMeQHDxJiqz0I1uvlSuju67TJjeA5Xm/BPylO632Kwsiu2eavM8k/SufPLqpFOUKvhklWqET3esUIpaFXZ9Torg3MCaa/OAvgzII3cRH3vuJ7nW9DxdMWSLN9FixHgmhP3cuwbGK6BDlQQjKWQJduI7B50zCv6k0v3Xz+7ebjIbTN7/xgzaXGDmgZ1XCJPyBSnUec0eAN/jgfpBbQncBxvet8L/6p+5F57seumUaiCPiP7F0t8Fsoe3H91uyts2IyRP19CA7lN5pyGa2azsyRRsoKWWh49JJnZmmGoTuQM3P0tZGHRXmJoodDAVbSE3d6C2Gg0zEaiD2YfP3LWDXn7sI1jcZe6aZm4gMEOYaEeHMK35SiaTyVdHMmUhUWMgAGhjxC4Y9l/8xR9a9GY0yqlKNFzRuj/nLWPLLUncNnisxIPu3psVdTRHwj+wWmL6LoGo/bz8K5d+pFskcgiepfymxQnju8CzOO8SWRMsLqE67aYO/GCL8SOmIxw+7D9+g/FesHl5D19oCwuv7/hj7VkH37JrnUheDhZuVqfRBy2CaFyQWsDqSYsUMLGkcOrBGtmYhhasVdjlCBWW+mwhKddYsS/rmIgw0jdCDXCDyn6f60pfN050571Dt7I6DHleF0SH8Gi71mDQ73EXe+6vIVHkNaS5C4j2GP48XG9R7vZR5T/wuNU8qFVSJmRow51OESy3Nyho+FTfWHflNOXracVIQqW8vUJCdGtLrGccDNrhsYwrabgpJQ3TohFzX7RRi0ASoJgor0uxSFDgQZtUnt0vFTPOR5XFBBLwa05X21lM2r1EBQ5PNcrV8CGkYSDBiW2UeN2cv5X24jZ5DUv+MZKMqNAMH9Ynyu0KsmRBOLJmhj0py6x1jF/otPsURy41EOOAV4xx1pUvAcNZhWlhSswPuFgOywQE65fnyvzqfzG2XF+32tGehFcUy7RrNwzTuKLRvasnOXyLDT9SRpDlWd2maDC0Mmeatep6tV7ppMva9w80ljwG9NSc3SzyrlZdufQgElK1JpxtnRILUiL224k4ilPBtVCWMqfHGBg+fDIbfeEbhZs9/QRG3oiw1l6pIxHzmeOeppFOMPuIopntjrBXm/PTfpdmKrMlJd+qYNklS3zAk84db+","X-Forefront-Antispam-Report":"\n\tCIP:2a01:4f8:a0:13df::219;CTRY:CH;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:ZRAP278CU002.outbound.protection.outlook.com;PTR:mail-switzerlandnorthazlp17010004.outbound.protection.outlook.com;CAT:NONE;SFS:(13230040)(35042699022)(1800799024)(82310400026)(10070799003)(376014)(14060799003)(36860700016)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1102;","X-MS-Exchange-AntiSpam-MessageData-ChunkCount":"1","X-MS-Exchange-AntiSpam-MessageData-0":"\n\tILGMHnT0h5bkhb5wkk2XDqA47/bNzQB8jkTl0POMOn2MDbu8ux9I0RzELFbtjiFzYOd2byjN6asDyT6jCED9fLc/TQmzlm+GPeiSgLYTT+evce3G1wS4drca4LNaUBN8dBAlQ5rAfMnzBgVH+nlTNwBq7T88wCsZw7yTU16IsbsFa1zIkKW2B3ECuIM03IGsn0pH+bqZ9VYqc5h/wca24BqlVxqKs7ZJg13ENy2BCwOj6jI32BMDePEJfmk/HOZFmBuoJbahGtNEs9qN4lioGuEAeCFA5fNlUwdRLXmF7NtmwwpXMXcBCN38Se1pvMk1xqtpsaVIUb34d3JUA6H8SH7ABzMnnZ4cmNMNpRny0oU/JeQEun9iVzS2HF5aUufdtMYN7ZIiEAS6yFroUtfGyLV8+Ltb5gZD8OdEo/In48awNu/gNR4bgTsE6FtDNC/I","X-OriginatorOrg":"duagon.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"07 Apr 2026 18:49:18.6512\n (UTC)","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n bcb99e0a-195d-4ff6-fada-08de94d65fff","X-MS-Exchange-CrossTenant-Id":"e5e7e96e-8a28-45d6-9093-a40dd5b51a57","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"\n TenantId=e5e7e96e-8a28-45d6-9093-a40dd5b51a57;Ip=[2a01:4f8:a0:13df::219];Helo=[hz-deliver01.de.seppmail.cloud]","X-MS-Exchange-CrossTenant-AuthSource":"\n\tDB1PEPF000509EE.eurprd03.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem"},"content":"For adding support to port-mapped devices within gpio_generic_chip, a new\ndata type is required for passing to read_reg() and write_reg()\ncallbacks as I/O port-mapped and memory-mapped registers use different\ndata types.\n\nIntroduce a new struct gpio_chip_reg to encapsulate mmio addresses and\nI/O port numbers.\n\nSigned-off-by: Jose Javier Rodriguez Barbarin \n---\n include/linux/gpio/generic.h | 14 ++++++++++++++\n 1 file changed, 14 insertions(+)","diff":"diff --git a/include/linux/gpio/generic.h b/include/linux/gpio/generic.h\nindex ff566dc9c3cb..87c624070901 100644\n--- a/include/linux/gpio/generic.h\n+++ b/include/linux/gpio/generic.h\n@@ -18,6 +18,7 @@ struct device;\n #define GPIO_GENERIC_NO_SET_ON_INPUT\t\tBIT(6)\n #define GPIO_GENERIC_PINCTRL_BACKEND\t\tBIT(7) /* Call pinctrl direction setters */\n #define GPIO_GENERIC_NO_INPUT\t\t\tBIT(8) /* only output */\n+#define GPIO_GENERIC_PORT_MAPPED\t\tBIT(9) /* port-mapped */\n \n /**\n * struct gpio_generic_chip_config - Generic GPIO chip configuration data\n@@ -56,6 +57,19 @@ struct gpio_generic_chip_config {\n \tunsigned long flags;\n };\n \n+/**\n+ * struct gpio_chip_reg - Generic GPIO chip register descriptor for MMIO or port-mapped I/O\n+ * @mmio: MMIO register address.\n+ * @port: I/O Port register address.\n+ *\n+ * Describes a GPIO chip register located either in MMIO space or in\n+ * port-mapped I/O space.\n+ */\n+struct gpio_chip_reg {\n+\tvoid __iomem *mmio;\n+\tunsigned long port;\n+};\n+\n /**\n * struct gpio_generic_chip - Generic GPIO chip implementation.\n * @gc: The underlying struct gpio_chip object, implementing low-level GPIO\n","prefixes":["RFC","1/5"]}