{"id":2220463,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220463/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-10-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260407104154.2842132-10-sherry.sun@nxp.com>","date":"2026-04-07T10:41:51","name":"[V11,09/12] arm64: dts: imx8mp: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b1a6f411f80cfaaf191c956e56c1641e0cc4f6a0","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.1/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-10-sherry.sun@nxp.com/mbox/","series":[{"id":498961,"url":"http://patchwork.ozlabs.org/api/1.1/series/498961/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498961","date":"2026-04-07T10:41:47","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":11,"mbox":"http://patchwork.ozlabs.org/series/498961/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220463/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220463/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V11 09/12] arm64: dts: imx8mp: Add Root Port node and PERST\n property","Date":"Tue, 7 Apr 2026 18:41:51 +0800","Message-Id":"<20260407104154.2842132-10-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260407104154.2842132-1-sherry.sun@nxp.com>","References":"<20260407104154.2842132-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"MA5P287CA0060.INDP287.PROD.OUTLOOK.COM\n (2603:1096:a01:1d3::9) To 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vePGYGK//fZwaXXThBYhLrFwfqa39NSDrKCtNwbSWzy8tV94pcwqUjdzIUBh6QJAyRTbG/KiEroTOWZ7x5yHU6XXQHH4qZtx0aamEaKqE+ZqhHtN5Nc4qsAS4qjyzfNokRELXNb4vTKYZh8E6JiA9i79C6GTG9im+wkpESDTsQkHkHEtxMojX4gUOkhxjVoGTcVnPKABxTexYpBbF+jVdLPTNGb/YSFA1HsQyWnmc8FQgC499WPbm4Igtv+BsjMw4ogfXFTWFSlSjIRRSIybQcFd7BDKE7Lghh+E3v5OYyyz0qxgp6CFt0Nnk0VehFjELjGStDoAt0KbJ/SHFKRxDyl8dntx+fcrPOCPO89O/9Pf/Na2f7JC4cIE2CVruKGmLT+ItEScqDgzV1dy7x3rfK23IRCkyMoW+Wdyt9B3Ysgxw+lgiU6qRgWeLxMtHRp2Lm4l2ZcKPZTjw7csojjJm3ZwOe+OatPwi6NUVDeBijXum9DFSgRNw6YypNUeYMbuv9CuYj6OD3afIybgazeUqm80uTSieM4u5fzL8ub+0C7DdioRmky9Qk0tEB6JyFayjygIACzCygAK9woaqt8ZBh0PycK9y1GwFtHEsW9qxtXVe6Vn24+NB/AiaRJBQ85YczC7sfL2SGg3yLjwP7bBjtHrvrxSaDHzgohwqBAXqWFVr0qwPCyvgTiMaQtvaZCungLsbE226imXdGcBuIzgaB53aq90Yp58+37+XCyCeS0AliKJiiTthIG+39s0sLZJ1g8csCH6KOolqQEllpAGiGXeD1ReelojCxzPs+4RExxH4FiuzPrt0TLeQTokjaAYG9ShsK7MvobKNhT0KaclErzYp/V8Vc1VvXVovE5LNs9441v6FzfN3fZ4389DbbGTNn42JAiiH+HcoyFavJPoTZTEEfQgGT7bFPbqPgl23H0nHE2CW5yLIdRe6R4zUsSeuHeNqvFrc9q+GKWFU7KFt1wQS0CjmlwusArL6vh3T35Sadgw2xRnex3R9y/2u6X/pFYDCXPv3QIKKo+lQIaey//z834qoIr5W+AYRA75pPb2XuE7vWkc0A6YfqbNITne03Ws5ABfGfA4/99du+s89JjT9F7LO9xU1y7Xt3GfVDWQTy4r7rdEBVEJOK4RZNzHwGXIin+pL7q582SoPH/xe/bXvAeQUgSSpqo76lUlEVS8rYfoIJlEz1ub4r1TXlUndQJZzeilbLzceW8ZKymG52Dg7JE5T1eJ8Broc+8ZmuoBfzV7+qB/37E5N3Mw/zvfH4Befi3I/8YDUHtDxJ4o8ia8IszCFeQXl/oS3qyo9+IV6W5RAUsYs4FM59SfauI15KRZRNlPhfldw8veHYytXswvIhAXu7Xhl0YPoacGfVi8M86y/jaOtKLG4i2U0dN2BGt4DgHcSyhfAl7oPTJa0i1M3MHbs4sEUBfXHmfP3cWgpHsdt1lEu2cQmS/7KT2pF1jBgeBiTJAQkoI6gxQvfkjU+wMcnH/szxYduh3vIIlGGkulsuZHrXN+mwSN5kT7xXM+v8dTtYZo2+YlAwkggvO92VaUgmt7F7EiorlG33Fy1jn+z05PaUlpytGBRTPQsSC0ZOgsS48DR7hWIYDQyWM6SLZsYa/pigAFbTFlLDA0dakcFP9aZKjjLrgMAs45/zu+cCxwS0aYtSEAT4BUfxwAGMI79gsM+a2nZQyv/hhDkVf21XbXAQbZPyryhOKxqjsHFqOTnNbPbATHSI8aqQ==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 52842d84-f32c-495b-81d4-08de9492644a","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"07 Apr 2026 10:42:40.2655\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n roIT9QBuP8ncvR6eFijMwG+3Nl67j8G0bQuIkMegWeNeC5KL45fzS+idu+x8sC/bxWgHG+ZC3jyVza1ACPlhEQ==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB9PR04MB8281"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 5 +++++\n arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\nindex 2feb5b18645c..a7f3acdc36d1 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts\n@@ -770,6 +770,7 @@ &pcie_phy {\n &pcie0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie0>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcie0>;\n \tvpcie3v3aux-supply = <®_pcie0>;\n@@ -783,6 +784,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie0_port0 {\n+\treset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;\n+};\n+\n &pwm1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pwm1>;\ndiff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi\nindex 90d7bb8f5619..5ce2825182fd 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi\n@@ -2265,6 +2265,17 @@ pcie0: pcie: pcie@33800000 {\n \t\t\tphys = <&pcie_phy>;\n \t\t\tphy-names = \"pcie-phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie0_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie0_ep: pcie_ep: pcie-ep@33800000 {\n","prefixes":["V11","09/12"]}