{"id":2220460,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220460/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-9-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260407104154.2842132-9-sherry.sun@nxp.com>","date":"2026-04-07T10:41:50","name":"[V11,08/12] arm64: dts: imx8mm: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ffc89f47cf41525da5762048fbaa6ba79f00a818","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.1/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-9-sherry.sun@nxp.com/mbox/","series":[{"id":498961,"url":"http://patchwork.ozlabs.org/api/1.1/series/498961/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498961","date":"2026-04-07T10:41:47","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":11,"mbox":"http://patchwork.ozlabs.org/series/498961/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220460/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220460/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V11 08/12] arm64: dts: imx8mm: Add Root Port node and PERST\n property","Date":"Tue, 7 Apr 2026 18:41:50 +0800","Message-Id":"<20260407104154.2842132-9-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260407104154.2842132-1-sherry.sun@nxp.com>","References":"<20260407104154.2842132-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"MA5P287CA0060.INDP287.PROD.OUTLOOK.COM\n (2603:1096:a01:1d3::9) To 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YX2TmxUnI8cRnTkgurRLe8pxXZa0/7SBL+BvpXppDQ9anXnGIS57Ac7uhgnPc4oYoFXjhZppACutba0KfpLeodz8qcuCipNFsiylG2JeQYmlZ0BRUKJhTBGFoBVhjAUYsN/7g4JOBRl2L1z6g/eG3qSYeoJuCipPMGTS09tJ+h/vEqutxafV/uBY9nhp9POAEtWcjf5+VlbP9EiFO87crl37j25pRzg+gcvSf0lMeeCu4bmMKYjODUcd8fa4jQ4JU24xgQpJF1UiheDgbKmz1BWIb2BgNOTvNHPni/kX6ER7AY0VGvFDexH8HaXi0PgVy4dN0hZ86vJ9XeV/uSn9fqYTVsEKiZ+ibRc3GxrNA5g+NREY7F5o5H1oZvlIeDBptRfyxDnKHobn7sWy2mZlNuqt773lGqEMEL7jOhSpeOf1ao1Kgu47xZJVW4uXc7lF7o4jK3vY2Odgbd3nrmROAi0Yj8FNiRy6qk3AsqNamYkhPxlXfTe8bCQRxLz/gh/A8sqXRWzo+LD45pyqHueBDLII0guu9IYh2jq6OLkfwCiRxIVR5N895zmmmugBwBxUTe0l9UDFeJGnlzCqyan9S7uO1oWfiG8S9hxpBu2Ea93Un51eO0TY9+hOjgXi1SVOFNIkpbfTVpPUAC6fVa/oJGeC3zVAXWqaB2mGa7b0LWIPSDy6T2GGftC6RZkIvqg5YYhlB0f+fNynZaNSkPJieJdTQ2zItremeB9MJLIZS/vQ2G3TFtqhObnltF2J2srp26hkJJQ5tX8RzHoo/sL6+7Y91DS2NhR2jvQ1UDnBaNNSYW8PUnEyBcAMZhgpLRMNlYG+iWE/zvXpInsEi2Q8m13AyyWRuhZA6nDLEwb91qSxaGtj+oq3gvf+MicRdryquj1QR2KQ5BIgrBzJxmbTQCf0SQ5G2VNHUNKylQkEb9q/LzLCUdx0kPRwPAeWHXBNiq0N1047t4heE9rNWxMp58VeXInRnSepYeh4nqSgI9CHk3l/Ayp9TNuIMEPocC9Bd75EqhgWqYmhQN8Y76501021cRWFdQWsDFz82+BV4L6X4I1xlMw/dxA409g2f8TTgVJ1BBTYglnCS35vPfSpUV1kXoBputJAQXDO5ujyJZKijzPhycAsB6w/DvBKxQkXCjqSC14spoMmY6fRj48Sb6eeO2bpw7N+SIQIl3iWs48qkMe1F5z2JTRBC8LnCzNZ5oCtmO5kmhfge7pUIZ+cUqQlqnFNxmgq/hRaeWc1aQXdVVUmgOQAjKZn8eXKvdkdn8Mrly+EK7pJmLCmtyzlYyDOuuzEqSt4Uk08W3vs4MPg0LIv815MJt6WPx2W525kqwvOWuycZp86boX8OwbyFjoSp4X9UzqjeQKgaCVxzdGRx3heKNARJlFoWJTs+mUW8SIoijWHnsfXgI1Jx7saSw2BkbUSPcpPgSYXjMqaDAElpfItv3rkz2AbDi2xdvGCLDrCeRUly/XiCw4r1MqEvCbB6c+z3xcxTMyQUXm4kJcHzsmpDFPjTVqWrbQvFPZquQgDsUWF4Entqw7RyTk/kPcotJPHGh2cnlJcpgG1plXpTaFgE61SL4vc5BI6LhO9ws4FBBqnoaGOfjb+LmArm5g7yQIjkBptKhQ5d1nzk78o3f9vOOTQc0b3nhcEDLsYOSPnt5mzceVYkSY4+orKLsu0GtoZF6YDhb3d6zLzvsEI6agsvVXlOT2hEajUzm+Qhk4k2KYdZoFwuONOMfYYXQ==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 52781626-268a-4286-4baf-08de949260a5","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"07 Apr 2026 10:42:34.1914\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n QTc2eB1lKZ+bLsuH/ywOkwmuVM3rQfm5rO+RXU5LxBxXxLeksO9RtzL18A/zM6Z72CNvWFjGZzsLarOBgM3LEw==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB9PR04MB8281"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 5 +++++\n arch/arm64/boot/dts/freescale/imx8mm.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\nindex 8be44eaf4e1e..e03aba825c18 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi\n@@ -533,6 +533,7 @@ &pcie_phy {\n &pcie0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie0>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;\n \tclocks = <&clk IMX8MM_CLK_PCIE1_ROOT>, <&pcie0_refclk>,\n \t\t <&clk IMX8MM_CLK_PCIE1_AUX>;\n@@ -559,6 +560,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcie0_port0 {\n+\treset-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>;\n+};\n+\n &sai2 {\n \t#sound-dai-cells = <0>;\n \tpinctrl-names = \"default\";\ndiff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi\nindex 4cc5ad01d0e2..5cf2998d396d 100644\n--- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi\n@@ -1370,6 +1370,17 @@ pcie0: pcie@33800000 {\n \t\t\tphys = <&pcie_phy>;\n \t\t\tphy-names = \"pcie-phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie0_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\tpcie0_ep: pcie-ep@33800000 {\n","prefixes":["V11","08/12"]}