{"id":2220459,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220459/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-7-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260407104154.2842132-7-sherry.sun@nxp.com>","date":"2026-04-07T10:41:48","name":"[V11,06/12] arm: dts: imx6sx: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1cfc0566d7798f9ef7040934b1aef468b23e8712","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.1/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-7-sherry.sun@nxp.com/mbox/","series":[{"id":498961,"url":"http://patchwork.ozlabs.org/api/1.1/series/498961/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498961","date":"2026-04-07T10:41:47","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":11,"mbox":"http://patchwork.ozlabs.org/series/498961/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220459/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220459/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V11 06/12] arm: dts: imx6sx: Add Root Port node and PERST\n property","Date":"Tue, 7 Apr 2026 18:41:48 +0800","Message-Id":"<20260407104154.2842132-7-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260407104154.2842132-1-sherry.sun@nxp.com>","References":"<20260407104154.2842132-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"MA5P287CA0060.INDP287.PROD.OUTLOOK.COM\n (2603:1096:a01:1d3::9) To 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L2JvirSGIiR2abMj0DLXqAO5UEP3YgtLlc2kNmE1cE3OUXpvv8T2jfzOxJWN1YqUzYosMOSH9WetJAzqTIetFNnpflX5/rjLswoR5+1bQHXzCKUfYYcsECvpxGZPj8Q/0MJpUu/JNs7IYkYgjiGcpCyiK3gJJCpTqjGIdTUGW2I6NDe/L65hnxaBlEXzW+0fe8xvZW6KuqBWBb4q2EBVUKdVDK3dqurpmNj6VYih+11HFw6mzzh6pftS1NXAR5FVk/XYu/cpVPPUHqPw8r1SzJkn4GABNc5ZS6NW0s2SBoRMoqQsL706fOIVyPCo7oGaD7k9CF36QgHz4yjtp5b+i/dPzM0FN+ryoWjc7c6Mb1r6ZKD2VlGTkGM1QnCIava3roHDk70LJ1EcrHVIsmyyuccAZ8lwDw7w/mmGgwll9RIrtMhqcWPYxMGzbNZvhO7JXV7g5WgYwX3e484qIwsTdJPh4BwDOI0tzmKceG+6CxIfNY1KCG6sBvN79EUWUJXIDMpHFTOyhMOD0fp82jOKMQSLwgM2xxaSM/7aITJxTQW6GnBfWJJThkYXNuqey42CkLg9lzIt+FY0MiwtC6mZvkFvBorNDRQyT7S5oWRo7JMZYSnoCPVI1lMgbR/+ESpZCHfYbOgdK/IimLS6L7kYY9H2zf4rfqCFJdRyCX0Mu53BMoEUsC7BAmSTudv47uUi7lS4If8vx57JHdOrDm2YG6tLzDJuzGqB0pI4/AhRHJL4CGqQa/7LrgwaKgKAMugcdZoSOaR+AqEhJkxifVQ3O9IEtbx0+KnhoxipdJYZEqeReBOvoMuBy2ehCK1ZKp3Y830yrpKgRm7V3Soxmj+H/rUXuIdWDfEZWKGELtDDree7m011X6KC050UiKLEti6eK4VpQ7kNSC4DQfAFUXglZgC1ynljuaB5PmdDem2LEqiWlA6dxxpZPMfmV1xzC9H745wC989F87WqTEVZaP6p5gnUpu5rWsWt/zIjgME6iMzoYuDqDwy35gwHiIrBk9XBtLMT+G8k6WbRCHI74JhMbGegSFa38fuXLdToAmI5fsNEJISBmvR1Jb51zRyVA8AMGzU13NuibvbLkJlJI4Pzm6VkJODZ5ap244rf0OOeZb2yPQKfK4alQvhN1zjqFybwo1/pfoaDaka1MVywS0PhcwceLQTXgtEUljVe4WeIeaUqVI0HllYa+4esaqvRJNwNXtA82eAdiMsPgDpGEmybin6SuiGFstRjRsy7ItUOUIarXGWI6T6+Q3jPGft66u7lei1a/xU+qwh7+4+fNzs3ohW5GK8BRpAJ46B89M9gEWg4YOZ72cFFO1cbNaLNsNqJOggk6wUos+MJD7H7zrrQC/7+p5P7jE2D4Yo36RF6tN90dDA51ma32hB///DSZYamhqxEgBa/mVqqTPEYJ9Uk7+y6WtsuFJWoI8iPWNu882Yzf+RquZqcaiv9AEmw3E1gCAChF9z9m6PBx2cQjdfIadeQol/6S5x6cc/QzrHuz5zTIxNSJEgo0FWyXLiGSLHV01s/GMwgu7bxFHq2/c1V5K0nVi2Za4WbIuAao69So9/Y4evwTQ0Ug9Kilh5GB3HxzwwLjvM+nDqpvUXX1xVlvNtBY9mdyXJUwBYJW9vcVTqwsCg+7Nvy/aCB2WqK8aDRoO36WbtWTch1QXW3UuOfEbTgEGs63KOJyoBTBn5cpU8uTy4XgKnvrC4xoAP8fRIT0Z3ZB4C5aM4HI+3kzPCY+A==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 3609690c-f007-4d97-d5d5-08de9492591d","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"07 Apr 2026 10:42:21.6853\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n lSXy0FfXQNM6OEQl5+COdaMe6jkQ9rZi6Xc5RWFkiVZ8Z7MpwXzQjQLm1ZgsynvdAfZ9zURt2It/FAC/41C/GQ==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"DB9PR04MB8281"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi | 5 +++++\n arch/arm/boot/dts/nxp/imx/imx6sx.dtsi | 11 +++++++++++\n 2 files changed, 16 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\nindex 3e238d8118fa..338de4d144b2 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6sx-sdb.dtsi\n@@ -282,11 +282,16 @@ codec: wm8962@1a {\n &pcie {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio2 0 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcie_gpio>;\n \tstatus = \"okay\";\n };\n \n+&pcie_port0 {\n+\treset-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;\n+};\n+\n &lcdif1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_lcd>;\ndiff --git a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\nindex aefae5a3a6be..5484c398aa37 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6sx.dtsi\n@@ -1470,6 +1470,17 @@ pcie: pcie@8ffc000 {\n \t\t\tpower-domains = <&pd_disp>, <&pd_pci>;\n \t\t\tpower-domain-names = \"pcie\", \"pcie_phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \t};\n };\n","prefixes":["V11","06/12"]}