{"id":2220458,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220458/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-6-sherry.sun@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260407104154.2842132-6-sherry.sun@nxp.com>","date":"2026-04-07T10:41:47","name":"[V11,05/12] arm: dts: imx6qdl: Add Root Port node and PERST property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"43d7f52975a094b5879c870d0f333050853286c7","submitter":{"id":77063,"url":"http://patchwork.ozlabs.org/api/1.1/people/77063/?format=json","name":"Sherry Sun","email":"sherry.sun@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260407104154.2842132-6-sherry.sun@nxp.com/mbox/","series":[{"id":498961,"url":"http://patchwork.ozlabs.org/api/1.1/series/498961/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498961","date":"2026-04-07T10:41:47","name":"pci-imx6: Add support for parsing the reset property in new Root Port binding","version":11,"mbox":"http://patchwork.ozlabs.org/series/498961/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220458/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220458/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n 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","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tFrank.Li@nxp.com,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tbhelgaas@google.com,\n\thongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de","Cc":"imx@lists.linux.dev,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH V11 05/12] arm: dts: imx6qdl: Add Root Port node and PERST\n property","Date":"Tue, 7 Apr 2026 18:41:47 +0800","Message-Id":"<20260407104154.2842132-6-sherry.sun@nxp.com>","X-Mailer":"git-send-email 2.37.1","In-Reply-To":"<20260407104154.2842132-1-sherry.sun@nxp.com>","References":"<20260407104154.2842132-1-sherry.sun@nxp.com>","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"MA5P287CA0060.INDP287.PROD.OUTLOOK.COM\n (2603:1096:a01:1d3::9) To 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5gBfVJSVE1ueXKAllnuu96x19Wd3mOo71769RIF2IJ4konhxOJzIIRZgKjTIv8HE8u6TLDa7yMKpFVrJ5OxMfJeghK12D9DO4NcDQHsuYJhi7bFYg5ynH9MaXq9EjHqp2W2gMPWiSD2nCWrtUsRbsf9PPhjwnZEC6hVEC0szuKAwY9MiYQkP3FFWoaWqWfxo1vc3D19t7tpbkgoHj5SnDRWyN1fVJkiEL+AE7qVevWcu/D1bbNfEAocKbqLT8JRCnm55X2Rk/rabND7G6UV/BBV3tsuEho63BFayWir8+L9otZjIP+Wy8utXtXZls0UrOk6XHwgc3k/Wqiq50YDEbzhllgjCUw2pHsoHy3iMqOaLuJXFLqAqk7ntCEnwZOYAjl+kZERRLVy9onVyW1sYg83BlE0IH4oucMr7X/VgfMywPcDDl7txuPyWRU0DFmilsMhPkF57FNxcMjhylWaX4G1gGh6GprCCuRHOdPktcyflOWx4D2Khz6+YXbAv6zzWdKWg15MCM0RZXx2z4Kf13fl4bbghSraeQ/LoixaPkkEhBRF/CUdVosoGFyNsqrlxGsEk3h0xGmTZF9BsL79Nbfmtiis50+Tx36culmVhxyC2AJDdub3e43sjJGme+9vE/ARXLkjXUb/2VbFE1EpVRj7HeQW4Sn5ewlJ8JhWZcDss4grsDkhIUPPlN/ApSX4XiGQ+wUwGK98chJPnyj3hySGIsR+d+UQBBJs20Ikp0AlTS4/JD/+EZA0lvG9sE67vtQWmPGec2fHZknhFi2CCj/CW+cqFUj02eUlKf1sHkxGRDDEiE3CIJ+tqTkXDd/Q0tmayWH1hPyFhWsNL3PzHb+YHVORkYmq3KSFbFT9huOWkT0HvtPeoPehCBi9wZO6EbxrcFGGC3y6ID3RIYR6cNP8aHndZ0T6wC1FblSIqdNr1/wlT0MWEYvYAF80h7hT74I1rKTh7PdoF70lAiZ8rJK+mG7h85VHs9g2iZUMJC1um+FU+0+EUn4tBLGWgCnccCeOcz4UPkkUZvprEMLg+2BiGDIjtkZm5I40upMDzaVdn7D0nvHhAY3pg5bd5OhgThtGDFAhAaaakDEPoyXZiHNXO77xXMZyLJD4RFNtdTD9aYbrM+hoF4bQze1M/wex0gahkc4wqK4DtNY4rwNNH0cBV3PZ+7EVo/JvcnoCfo/ng6FAIo4HgxyTJjJNrzggf7fiK+j2f/k/NI2SLcMUu8gxoZMzx9AQGOrHBM7k+CSwDv0aaVVFYdlszs7+1n2LiSTbUm+FX2TvPaHKAmiABEwexHGLYogvC2+H77MKt/lQLmrmO5pMVEw+Em5qGsNe6z6ItmNii28ysbOEEOQEYjcdYNAfOeVrdmFcryTWmwEuLbNc2IQLhXaCkLhjrylz29rS2B6cypYW9Jc9qrwnwr/RMYwNu1fHS/ir8QehJz2pDqRHAgrvAGIoC5a8M6sfaBucPE1AYsJpjC9n9kHzLtr7veTGg1deMWl5m3CdVE+n1OcmNVt6j0pAK4eASUqzVPMJDe6cRcLjfTfIXEBWmIQxQ/jWg8M0hhJX40F9efO/MlBkjpMa8e8vPdWaoP45+JOQj5Hfty3X/OZTu9Gj1gZGUoLA/C+xLxJcq6UoUQxiIjZPz6mIe8Xu7NE/fmm/M2uRoC/bIXWvVcRNCubYT/6SDKV70vypmVr7ov3R/Fg80NSuHgMDRbl7pYo90XPRBycHAQwiRbQHVaijhXoIuCw==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n aabd8a60-2d4b-4fea-ba5d-08de94925571","X-MS-Exchange-CrossTenant-AuthSource":"VI0PR04MB12114.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"07 Apr 2026 10:42:15.3830\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n 0gzbPq/FBX9iLkSmGCiZ3DCymhzi0qFHlApdmXeH+/38LEka/X6E0QpvAHHnl6dED+SUJKls/IIx7crDCLROyA==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"PAXPR04MB8831"},"content":"Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun \n---\n arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi | 5 +++++\n arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi | 11 +++++++++++\n arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts | 5 +++++\n 3 files changed, 21 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi\nindex ba29720e3f72..fe9046c03ddd 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-sabresd.dtsi\n@@ -754,11 +754,16 @@ lvds0_out: endpoint {\n &pcie {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pcie>;\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcie>;\n \tstatus = \"okay\";\n };\n \n+&pcie_port0 {\n+\treset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;\n+};\n+\n &pwm1 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pwm1>;\ndiff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi\nindex 4dc2c410cf61..9438862b9927 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi\n+++ b/arch/arm/boot/dts/nxp/imx/imx6qdl.dtsi\n@@ -302,6 +302,17 @@ pcie: pcie@1ffc000 {\n \t\t\t\t <&clks IMX6QDL_CLK_PCIE_REF_125M>;\n \t\t\tclock-names = \"pcie\", \"pcie_bus\", \"pcie_phy\";\n \t\t\tstatus = \"disabled\";\n+\n+\t\t\tpcie_port0: pcie@0 {\n+\t\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\t\tdevice_type = \"pci\";\n+\t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t\t#address-cells = <3>;\n+\t\t\t\t#size-cells = <2>;\n+\t\t\t\tranges;\n+\t\t\t};\n \t\t};\n \n \t\taips1: bus@2000000 { /* AIPS1 */\ndiff --git a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts\nindex c5b220aeaefd..6b12cab7175f 100644\n--- a/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts\n+++ b/arch/arm/boot/dts/nxp/imx/imx6qp-sabreauto.dts\n@@ -45,10 +45,15 @@ MX6QDL_PAD_GPIO_6__ENET_IRQ\t\t0x000b1\n };\n \n &pcie {\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&max7310_c 5 GPIO_ACTIVE_LOW>;\n \tstatus = \"okay\";\n };\n \n+&pcie_port0 {\n+\treset-gpios = <&max7310_c 5 GPIO_ACTIVE_LOW>;\n+};\n+\n &sata {\n \tstatus = \"okay\";\n };\n","prefixes":["V11","05/12"]}