{"id":2220286,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220286/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260406-mtk-spi-nor-improvements-v1-6-66f675cbbd3e@baylibre.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260406-mtk-spi-nor-improvements-v1-6-66f675cbbd3e@baylibre.com>","date":"2026-04-06T20:13:32","name":"[6/8] spi: mtk_snor: support newer SOCs","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b12fe17eb05f430ac177c33740f93705ed384537","submitter":{"id":87228,"url":"http://patchwork.ozlabs.org/api/1.1/people/87228/?format=json","name":"David Lechner","email":"dlechner@baylibre.com"},"delegate":{"id":161331,"url":"http://patchwork.ozlabs.org/api/1.1/users/161331/?format=json","username":"dlech","first_name":"David","last_name":"Lechner","email":"dlechner@baylibre.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260406-mtk-spi-nor-improvements-v1-6-66f675cbbd3e@baylibre.com/mbox/","series":[{"id":498893,"url":"http://patchwork.ozlabs.org/api/1.1/series/498893/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=498893","date":"2026-04-06T20:13:26","name":"spi: mtk_snor: various fixes and improvements","version":1,"mbox":"http://patchwork.ozlabs.org/series/498893/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220286/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220286/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20251104.gappssmtp.com\n header.i=@baylibre-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=ByXLDTfA;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260406-mtk-spi-nor-improvements-v1-6-66f675cbbd3e@baylibre.com>","References":"<20260406-mtk-spi-nor-improvements-v1-0-66f675cbbd3e@baylibre.com>","In-Reply-To":"\n <20260406-mtk-spi-nor-improvements-v1-0-66f675cbbd3e@baylibre.com>","To":"Ryder Lee , Weijie Gao ,\n Chunfeng Yun ,\n Igor Belwon ,\n GSS_MTK_Uboot_upstream ,\n Tom Rini ","Cc":"Julien Stephan , u-boot@lists.denx.de,\n David Lechner , \"Noah.Shen\" ,\n \"Noah.Shen\" ","X-Mailer":"b4 0.16-dev","X-Developer-Signature":"v=1; a=openpgp-sha256; l=2557; i=dlechner@baylibre.com;\n h=from:subject:message-id;\n bh=Uatn2Ihu8+Rogw43lASyi1h7dj4jj3pC7De8ieQvKF8=;\n b=owEBhAF7/pANAwAKAcLMIAH/AY/AAcsmYgBp1BQTNvbEc/5VGAqCclVMBjdaHJxZxzxWfBjOV\n xX+nbQr8UKJAUoEAAEKADQWIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCadQUExYcZGxlY2huZXJA\n YmF5bGlicmUuY29tAAoJEMLMIAH/AY/ABBsH/2a7qtUK35rLdFSu2g/hI/AXs+EC33xm5HzosyY\n cffP+Z3XEo4GL3hnDhuNY2wfMdtNWDFF7dhX/FUsvaJvm9eK5pQgEbJkMGt+xAaDMNMD/vgYhfM\n nPP+F/sR0QQl/kJ1Lrpe2rDbJba38zXOIGxxcCXpw4Hr6zExI5YXZdUF3wN1y3++sYiG4EJzZSB\n IoPVb4/kIdhswLMdWQfd5eEm3MoODCpT+flQsM+kmSvP+o0iaZFIti5u3ASJz4moY26uyBW3sz7\n a0XMMfaXYtghnTLhlDTdWXGS32Y+fz1nWriFZb6VgPtvac5hTaMyuPgVK4iB7f+ZJbgVP/UrwEz\n k+cE=","X-Developer-Key":"i=dlechner@baylibre.com; a=openpgp;\n fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: \"Noah.Shen\" \n\nAdd support for some newer SOCs. New compatible strings are added to the\nlookup table. Some SOCs also need a extra bit clocked out as a hardware\nquirk, so a new capability structure and code is added to support that.\n\nSigned-off-by: Noah.Shen \nSigned-off-by: David Lechner \n---\n drivers/spi/mtk_snor.c | 31 +++++++++++++++++++++++++++++--\n 1 file changed, 29 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/spi/mtk_snor.c b/drivers/spi/mtk_snor.c\nindex 77f94827568..649bca5716c 100644\n--- a/drivers/spi/mtk_snor.c\n+++ b/drivers/spi/mtk_snor.c\n@@ -104,9 +104,19 @@\n \n #define MTK_NOR_UNLOCK_ALL 0x0\n \n+struct mtk_snor_caps {\n+\t/*\n+\t * Some new SoCs modify the timing of fetching registers' values and IDs\n+\t * of NOR flash, they need a extra_bit which can add more clock cycles\n+\t * for fetching data.\n+\t */\n+\tu8 extra_bit;\n+};\n+\n struct mtk_snor_priv {\n \tstruct device *dev;\n \tvoid __iomem *base;\n+\tconst struct mtk_snor_caps *caps;\n \tu8 *buffer;\n \tstruct clk spi_clk;\n \tstruct clk ctlr_clk;\n@@ -448,7 +458,11 @@ static int mtk_snor_cmd_program(struct mtk_snor_priv *priv,\n \t}\n \n \t/* trigger op */\n-\twritel(prg_len * BITS_PER_BYTE, priv->base + MTK_NOR_REG_PRG_CNT);\n+\tif (rx_len)\n+\t\twritel(prg_len * BITS_PER_BYTE + priv->caps->extra_bit,\n+\t\t priv->base + MTK_NOR_REG_PRG_CNT);\n+\telse\n+\t\twritel(prg_len * BITS_PER_BYTE, priv->base + MTK_NOR_REG_PRG_CNT);\n \n \tret = mtk_snor_cmd_exec(priv, MTK_NOR_CMD_PROGRAM, prg_len * BITS_PER_BYTE);\n \tif (ret)\n@@ -508,6 +522,8 @@ static int mtk_snor_probe(struct udevice *bus)\n \tif (!priv->base)\n \t\treturn -EINVAL;\n \n+\tpriv->caps = (const void *)dev_get_driver_data(bus);\n+\n \tret = clk_get_by_name(bus, \"spi\", &priv->spi_clk);\n \tif (ret < 0)\n \t\treturn ret;\n@@ -584,8 +600,19 @@ static const struct dm_spi_ops mtk_snor_ops = {\n \t.set_mode = mtk_snor_set_mode,\n };\n \n+static const struct mtk_snor_caps mtk_snor_caps_default = {\n+\t.extra_bit = 0,\n+};\n+\n+static const struct mtk_snor_caps mtk_snor_caps_extra_bit = {\n+\t.extra_bit = 1,\n+};\n+\n static const struct udevice_id mtk_snor_ids[] = {\n-\t{ .compatible = \"mediatek,mtk-snor\" },\n+\t{ .compatible = \"mediatek,mtk-snor\", .data = (ulong)&mtk_snor_caps_default },\n+\t{ .compatible = \"mediatek,mt8188-nor\", .data = (ulong)&mtk_snor_caps_extra_bit },\n+\t{ .compatible = \"mediatek,mt8189-nor\", .data = (ulong)&mtk_snor_caps_extra_bit },\n+\t{ .compatible = \"mediatek,mt8195-nor\", .data = (ulong)&mtk_snor_caps_default },\n \t{}\n };\n \n","prefixes":["6/8"]}