{"id":2220284,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2220284/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/20260406-mtk-spi-nor-improvements-v1-1-66f675cbbd3e@baylibre.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.1/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260406-mtk-spi-nor-improvements-v1-1-66f675cbbd3e@baylibre.com>","date":"2026-04-06T20:13:27","name":"[1/8] spi: mtk_snor: clean up comments","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ab1e4c5324934bc06caea84e11168c6f880add0b","submitter":{"id":87228,"url":"http://patchwork.ozlabs.org/api/1.1/people/87228/?format=json","name":"David Lechner","email":"dlechner@baylibre.com"},"delegate":{"id":161331,"url":"http://patchwork.ozlabs.org/api/1.1/users/161331/?format=json","username":"dlech","first_name":"David","last_name":"Lechner","email":"dlechner@baylibre.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260406-mtk-spi-nor-improvements-v1-1-66f675cbbd3e@baylibre.com/mbox/","series":[{"id":498893,"url":"http://patchwork.ozlabs.org/api/1.1/series/498893/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=498893","date":"2026-04-06T20:13:26","name":"spi: mtk_snor: various fixes and improvements","version":1,"mbox":"http://patchwork.ozlabs.org/series/498893/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2220284/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220284/checks/","tags":{},"headers":{"Return-Path":"<u-boot-bounces@lists.denx.de>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20251104.gappssmtp.com\n header.i=@baylibre-com.20251104.gappssmtp.com header.a=rsa-sha256\n header.s=20251104 header.b=R1Evhtsk;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260406-mtk-spi-nor-improvements-v1-1-66f675cbbd3e@baylibre.com>","References":"<20260406-mtk-spi-nor-improvements-v1-0-66f675cbbd3e@baylibre.com>","In-Reply-To":"\n <20260406-mtk-spi-nor-improvements-v1-0-66f675cbbd3e@baylibre.com>","To":"Ryder Lee <ryder.lee@mediatek.com>, Weijie Gao <weijie.gao@mediatek.com>,\n Chunfeng Yun <chunfeng.yun@mediatek.com>,\n Igor Belwon <igor.belwon@mentallysanemainliners.org>,\n GSS_MTK_Uboot_upstream <GSS_MTK_Uboot_upstream@mediatek.com>,\n Tom Rini <trini@konsulko.com>","Cc":"Julien Stephan <jstephan@baylibre.com>, u-boot@lists.denx.de,\n David Lechner <dlechner@baylibre.com>, \"Noah.Shen\" <noah.shen@mediatek.com>,\n \"Noah.Shen\" <noah.shen@mediatek.com>","X-Mailer":"b4 0.16-dev","X-Developer-Signature":"v=1; a=openpgp-sha256; l=3605; i=dlechner@baylibre.com;\n h=from:subject:message-id;\n bh=7FKiLIsWrE5M09dO22Anx5t9LOBM17EPAAsIQzZDDEc=;\n b=owEBhAF7/pANAwAKAcLMIAH/AY/AAcsmYgBp1BPyJBWwGe/4nIWzzzl/rCs/nroBfkTu+B1vh\n TrtAnuFt+SJAUoEAAEKADQWIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCadQT8hYcZGxlY2huZXJA\n YmF5bGlicmUuY29tAAoJEMLMIAH/AY/A7VIIAIysvkIFVIaj4zs8CGxqtNIihbxUMe4JsW1v7x9\n S5NAAY6b8JsFHhQl+Lk2Z0p0TMNoBss5BPSRsmXqQ896EhID66eE47K9lPRxAmIROdL/xeL1gbv\n ea/E3RQKvz4PbiZHJ/rve6w7PJ4BGl+Y7IVWoUs8Bzcw93M8JXM7sR2zkW1XfXPvuwmOW7g4Ion\n Ckv439HIUq20MM2VmB0fjJgTx0Tb/c2CzJdGSGMI+oP8wj5tD55bbSFgxyBOoJXf5eeiKz8skHT\n /ii/DsQPe/5qqrA3p3JHKmeZZUB9Adb7jXy1vhdAA7wvHfHH/WDbkQbYsH1+GXZta9rkrAdKLzX\n v9mI=","X-Developer-Key":"i=dlechner@baylibre.com; a=openpgp;\n fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion <u-boot.lists.denx.de>","List-Unsubscribe":"<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>","List-Archive":"<https://lists.denx.de/pipermail/u-boot/>","List-Post":"<mailto:u-boot@lists.denx.de>","List-Help":"<mailto:u-boot-request@lists.denx.de?subject=help>","List-Subscribe":"<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" <u-boot-bounces@lists.denx.de>","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"From: \"Noah.Shen\" <noah.shen@mediatek.com>\n\nAvoid use of C++-style comments and fix multi-line comment style.\n\nSigned-off-by: Noah.Shen <noah.shen@mediatek.com>\nSigned-off-by: David Lechner <dlechner@baylibre.com>\n---\n drivers/spi/mtk_snor.c | 35 +++++++++++++++++++----------------\n 1 file changed, 19 insertions(+), 16 deletions(-)","diff":"diff --git a/drivers/spi/mtk_snor.c b/drivers/spi/mtk_snor.c\nindex f202b2f49f5..eb36c9dd5e8 100644\n--- a/drivers/spi/mtk_snor.c\n+++ b/drivers/spi/mtk_snor.c\n@@ -1,10 +1,11 @@\n // SPDX-License-Identifier: GPL-2.0\n-//\n-// Mediatek SPI-NOR controller driver\n-//\n-// Copyright (C) 2020 SkyLake Huang <SkyLake.Huang@mediatek.com>\n-//\n-// Some parts are based on drivers/spi/spi-mtk-nor.c of linux version\n+/*\n+ * Mediatek SPI-NOR controller driver\n+ *\n+ * Copyright (C) 2020 SkyLake Huang <SkyLake.Huang@mediatek.com>\n+ *\n+ * Some parts are based on drivers/spi/spi-mtk-nor.c of linux version\n+ */\n \n #include <clk.h>\n #include <cpu_func.h>\n@@ -89,13 +90,13 @@\n #define MTK_NOR_REG_DMA_END_DADR 0x724\n \n #define MTK_NOR_PRG_MAX_SIZE 6\n-// Reading DMA src/dst addresses have to be 16-byte aligned\n+/* Reading DMA src/dst addresses have to be 16-byte aligned */\n #define MTK_NOR_DMA_ALIGN 16\n #define MTK_NOR_DMA_ALIGN_MASK (MTK_NOR_DMA_ALIGN - 1)\n-// and we allocate a bounce buffer if destination address isn't aligned.\n+/* and we allocate a bounce buffer if destination address isn't aligned. */\n #define MTK_NOR_BOUNCE_BUF_SIZE PAGE_SIZE\n \n-// Buffered page program can do one 128-byte transfer\n+/* Buffered page program can do one 128-byte transfer */\n #define MTK_NOR_PP_SIZE 128\n \n #define CLK_TO_US(priv, clkcnt) DIV_ROUND_UP(clkcnt, (priv)->spi_freq / 1000000)\n@@ -168,8 +169,8 @@ static int mtk_snor_adjust_op_size(struct spi_slave *slave,\n \t\treturn 0;\n \n \tif (op->addr.nbytes == 3 || op->addr.nbytes == 4) {\n-\t\tif (op->data.dir == SPI_MEM_DATA_IN) { //&&\n-\t\t\t// limit size to prevent timeout calculation overflow\n+\t\tif (op->data.dir == SPI_MEM_DATA_IN) {\n+\t\t\t/* limit size to prevent timeout calculation overflow */\n \t\t\tif (op->data.nbytes > 0x400000)\n \t\t\t\top->data.nbytes = 0x400000;\n \t\t\tif (op->addr.val & MTK_NOR_DMA_ALIGN_MASK ||\n@@ -496,7 +497,8 @@ static int mtk_snor_probe(struct udevice *bus)\n \tpriv->spi_freq = clk_get_rate(&priv->spi_clk);\n \tprintf(\"spi frequency: %d Hz\\n\", priv->spi_freq);\n \n-\t/* With this setting, we issue one command at a time to\n+\t/*\n+\t * With this setting, we issue one command at a time to\n \t * accommodate to SPI-mem framework.\n \t */\n \twritel(MTK_NOR_ENABLE_SF_CMD, priv->base + MTK_NOR_REG_WP);\n@@ -504,7 +506,8 @@ static int mtk_snor_probe(struct udevice *bus)\n \tmtk_snor_rmw(priv, MTK_NOR_REG_CFG3,\n \t\t     MTK_NOR_DISABLE_WREN | MTK_NOR_DISABLE_SR_POLL, 0);\n \n-\t/* Unlock all blocks using write status command.\n+\t/*\n+\t * Unlock all blocks using write status command.\n \t * SPI-MEM hasn't implemented unlock procedure on MXIC devices.\n \t * We may remove this later.\n \t */\n@@ -521,7 +524,8 @@ static int mtk_snor_probe(struct udevice *bus)\n \n static int mtk_snor_set_speed(struct udevice *bus, uint speed)\n {\n-\t/* MTK's SNOR controller does not have a bus clock divider.\n+\t/*\n+\t * MTK's SNOR controller does not have a bus clock divider.\n \t * We setup maximum bus clock in dts.\n \t */\n \n@@ -530,8 +534,7 @@ static int mtk_snor_set_speed(struct udevice *bus, uint speed)\n \n static int mtk_snor_set_mode(struct udevice *bus, uint mode)\n {\n-\t/* We set up mode later for each transmission.\n-\t */\n+\t/* We set up mode later for each transmission. */\n \treturn 0;\n }\n \n","prefixes":["1/8"]}