{"id":2219728,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2219728/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-i2c/patch/20260404021920.359902-1-nissampa@cisco.com/","project":{"id":35,"url":"http://patchwork.ozlabs.org/api/1.1/projects/35/?format=json","name":"Linux I2C development","link_name":"linux-i2c","list_id":"linux-i2c.vger.kernel.org","list_email":"linux-i2c@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260404021920.359902-1-nissampa@cisco.com>","date":"2026-04-04T02:19:20","name":"at24: add SMBus fallback for adapters lacking I2C_FUNC_I2C","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"975d3d902d17a36e85546eebfb201e0587bff83d","submitter":{"id":93051,"url":"http://patchwork.ozlabs.org/api/1.1/people/93051/?format=json","name":"Nishanth Sampath Kumar","email":"nissampa@cisco.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-i2c/patch/20260404021920.359902-1-nissampa@cisco.com/mbox/","series":[{"id":498693,"url":"http://patchwork.ozlabs.org/api/1.1/series/498693/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-i2c/list/?series=498693","date":"2026-04-04T02:19:20","name":"at24: add SMBus fallback for adapters lacking I2C_FUNC_I2C","version":1,"mbox":"http://patchwork.ozlabs.org/series/498693/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2219728/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219728/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-i2c@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=cisco.com header.i=@cisco.com header.a=rsa-sha256\n header.s=iport01 header.b=T/rGlW71;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; 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AT24_FLAG_ADDR16 EEPROMs (e.g. 24c64 syseeprom):\n regmap_get_i2c_bus() returns -ENOTSUPP (-524) for reg_bits=16\n because neither I2C_FUNC_I2C nor I2C_FUNC_SMBUS_I2C_BLOCK is set.\n The driver probe fails entirely with:\n at24 3-0055: probe with driver at24 failed with error -524\n\n2. 8-bit addressed EEPROMs (e.g. 24c02 fan EEPROMs) behind a pca9548\n mux on a PIIX4 child adapter: regmap selects regmap_i2c_smbus_i2c_block\n which fails at runtime even though SMBUS_BYTE_DATA is available.\n\nAdd two SMBus-primitive fallback paths, selected after chip flags are\nfully resolved (i.e. after flags = cdata->flags and DT address-width\noverrides):\n\n smbus_addr16_fallback (AT24_FLAG_ADDR16 set):\n READ: i2c_smbus_write_byte_data(client, addr_hi, addr_lo) sets\n the 16-bit address pointer; repeated i2c_smbus_read_byte()\n fetches bytes sequentially (EEPROM auto-increments pointer).\n WRITE: i2c_smbus_write_word_data() encodes address + data byte\n in one SMBus WORD transaction.\n\n smbus_addr8_fallback (AT24_FLAG_ADDR16 not set):\n READ: i2c_smbus_read_byte_data(client, (u8)offset) per byte.\n WRITE: i2c_smbus_write_byte_data(client, (u8)offset, data) per byte.\n\nBoth paths bypass regmap for I/O. A regmap init retry with reg_bits=8\nis added so that probe succeeds on adapters that reject the initial\nregmap configuration.\n\nThe fallback is only activated when i2c_check_functionality() confirms\nboth SMBUS_BYTE_DATA and SMBUS_WORD_DATA are present, ensuring no\nregression on adapters that support full I2C transfers.\n\nSigned-off-by: Nishanth Sampath Kumar \n---\n drivers/misc/eeprom/at24.c | 183 +++++++++++++++++++++++++++++++++++-\n 1 file changed, 182 insertions(+), 1 deletion(-)","diff":"--- a/drivers/misc/eeprom/at24.c\n+++ b/drivers/misc/eeprom/at24.c\n@@ -88,6 +88,11 @@\n \tstruct regulator *vcc_reg;\n \tvoid (*read_post)(unsigned int off, char *buf, size_t count);\n \n+\t/* SMBus-only fallback for EEPROMs on PIIX4 adapters */\n+\tbool smbus_addr16_fallback;\n+\tbool smbus_addr8_fallback;\n+\tstruct i2c_client *smbus_client;\n+\n \t/*\n \t * Some chips tie up multiple I2C addresses; dummy devices reserve\n \t * them for us.\n@@ -343,6 +348,139 @@\n \treturn count;\n }\n \n+/* forward declaration needed by at24_smbus_write below */\n+static size_t at24_adjust_write_count(struct at24_data *at24,\n+\t\t\t\t unsigned int offset, size_t count);\n+\n+/*\n+ * SMBus primitive fallback for 16-bit addressed EEPROMs.\n+ *\n+ * PIIX4 SMBus supports BYTE_DATA and WORD_DATA but NOT I2C_FUNC_I2C or\n+ * I2C_FUNC_SMBUS_I2C_BLOCK, so regmap_get_i2c_bus() returns -ENOTSUPP\n+ * for reg_bits=16. We bypass regmap entirely for the I/O path:\n+ *\n+ * READ : write_byte_data(addr_hi, addr_lo) sets the 16-bit EEPROM\n+ * address pointer, then read_byte() fetches bytes one-by-one\n+ * (EEPROM auto-increments the pointer after each read).\n+ *\n+ * WRITE: write_word_data(addr_hi, cpu_to_le16((data<<8)|addr_lo))\n+ * encodes the address and data byte in one SMBus word write.\n+ */\n+static ssize_t at24_smbus_read(struct at24_data *at24, char *buf,\n+\t\t\t unsigned int offset, size_t count)\n+{\n+\tstruct i2c_client *client = at24->smbus_client;\n+\tunsigned long timeout, read_time;\n+\tu8 addr_hi = (offset >> 8) & 0xff;\n+\tu8 addr_lo = offset & 0xff;\n+\tssize_t ret;\n+\tsize_t i;\n+\n+\tcount = at24_adjust_read_count(at24, offset, count);\n+\n+\ttimeout = jiffies + msecs_to_jiffies(at24_write_timeout);\n+\tdo {\n+\t\tread_time = jiffies;\n+\n+\t\t/* Set 16-bit address pointer: command=addr_hi, value=addr_lo */\n+\t\tret = i2c_smbus_write_byte_data(client, addr_hi, addr_lo);\n+\t\tif (ret < 0)\n+\t\t\tgoto retry;\n+\n+\t\t/* Read bytes sequentially -- EEPROM auto-increments pointer */\n+\t\tfor (i = 0; i < count; i++) {\n+\t\t\tret = i2c_smbus_read_byte(client);\n+\t\t\tif (ret < 0)\n+\t\t\t\tgoto retry;\n+\t\t\tbuf[i] = (u8)ret;\n+\t\t}\n+\t\tdev_dbg(&client->dev, \"smbus read %zu@%u --> ok\\n\", count, offset);\n+\t\treturn count;\n+retry:\n+\t\tusleep_range(1000, 1500);\n+\t} while (time_before(read_time, timeout));\n+\n+\treturn -ETIMEDOUT;\n+}\n+\n+static ssize_t at24_smbus_write(struct at24_data *at24, const char *buf,\n+\t\t\t\tunsigned int offset, size_t count)\n+{\n+\tstruct i2c_client *client = at24->smbus_client;\n+\tunsigned long timeout, write_time;\n+\tsize_t i;\n+\tint ret;\n+\n+\t/* Write one byte at a time (page writes need raw I2C transfers) */\n+\tcount = at24_adjust_write_count(at24, offset, count);\n+\n+\tfor (i = 0; i < count; i++, offset++) {\n+\t\ttimeout = jiffies + msecs_to_jiffies(at24_write_timeout);\n+\t\tdo {\n+\t\t\twrite_time = jiffies;\n+\t\t\t/*\n+\t\t\t * command = addr[15:8]\n+\t\t\t * word LSB = addr[7:0]\n+\t\t\t * word MSB = data byte\n+\t\t\t * EEPROM: set 16-bit address then write one data byte.\n+\t\t\t */\n+\t\t\tret = i2c_smbus_write_word_data(client,\n+\t\t\t\t\t(offset >> 8) & 0xff,\n+\t\t\t\t\tcpu_to_le16(((u16)(u8)buf[i] << 8) |\n+\t\t\t\t\t\t (offset & 0xff)));\n+\t\t\tif (!ret) {\n+\t\t\t\tdev_dbg(&client->dev, \"smbus write 1@%u --> ok\\n\",\n+\t\t\t\t\toffset);\n+\t\t\t\tbreak;\n+\t\t\t}\n+\t\t\tusleep_range(1000, 1500);\n+\t\t} while (time_before(write_time, timeout));\n+\n+\t\tif (ret)\n+\t\t\treturn (i > 0) ? (ssize_t)i : -ETIMEDOUT;\n+\t}\n+\n+\treturn count;\n+}\n+\n+static ssize_t at24_smbus8_read(struct at24_data *at24, char *buf,\n+\t\t\t\tunsigned int offset, size_t count)\n+{\n+\tstruct i2c_client *client = at24->smbus_client;\n+\tsize_t i;\n+\tint ret;\n+\n+\tcount = at24_adjust_read_count(at24, offset, count);\n+\n+\tfor (i = 0; i < count; i++) {\n+\t\tret = i2c_smbus_read_byte_data(client, (u8)(offset + i));\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\t\tbuf[i] = (u8)ret;\n+\t}\n+\tdev_dbg(&client->dev, \"smbus8 read %zu@%u --> ok\\n\", count, offset);\n+\treturn count;\n+}\n+\n+static ssize_t at24_smbus8_write(struct at24_data *at24, const char *buf,\n+\t\t\t\t unsigned int offset, size_t count)\n+{\n+\tstruct i2c_client *client = at24->smbus_client;\n+\tsize_t i;\n+\tint ret;\n+\n+\tcount = at24_adjust_write_count(at24, offset, count);\n+\n+\tfor (i = 0; i < count; i++) {\n+\t\tret = i2c_smbus_write_byte_data(client, (u8)(offset + i),\n+\t\t\t\t\t\t(u8)buf[i]);\n+\t\tif (ret < 0)\n+\t\t\treturn (i > 0) ? (ssize_t)i : ret;\n+\t}\n+\tdev_dbg(&client->dev, \"smbus8 write %zu@%u --> ok\\n\", count, offset);\n+\treturn count;\n+}\n+\n static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,\n \t\t\t\tunsigned int offset, size_t count)\n {\n@@ -353,6 +491,12 @@\n \tregmap = at24_translate_offset(at24, &offset);\n \tcount = at24_adjust_read_count(at24, offset, count);\n \n+\tif (at24->smbus_addr16_fallback)\n+\t\treturn at24_smbus_read(at24, buf, offset, count);\n+\n+\tif (at24->smbus_addr8_fallback)\n+\t\treturn at24_smbus8_read(at24, buf, offset, count);\n+\n \t/* adjust offset for mac and serial read ops */\n \toffset += at24->offset_adj;\n \n@@ -411,6 +555,13 @@\n \n \tregmap = at24_translate_offset(at24, &offset);\n \tcount = at24_adjust_write_count(at24, offset, count);\n+\n+\tif (at24->smbus_addr16_fallback)\n+\t\treturn at24_smbus_write(at24, buf, offset, count);\n+\n+\tif (at24->smbus_addr8_fallback)\n+\t\treturn at24_smbus8_write(at24, buf, offset, count);\n+\n \ttimeout = jiffies + msecs_to_jiffies(at24_write_timeout);\n \n \tdo {\n@@ -601,6 +752,8 @@\n \tbool i2c_fn_i2c, i2c_fn_block;\n \tunsigned int i, num_addresses;\n \tstruct at24_data *at24;\n+\tbool smbus_addr16_fallback;\n+\tbool smbus_addr8_fallback;\n \tbool full_power;\n \tstruct regmap *regmap;\n \tbool writable;\n@@ -611,6 +764,18 @@\n \ti2c_fn_block = i2c_check_functionality(client->adapter,\n \t\t\t\t\t I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);\n \n+\t/*\n+\t * Detect SMBus-only adapters (e.g. AMD PIIX4) that lack true I2C\n+\t * transfer capability. Two cases:\n+\t *\n+\t * 1. No I2C_FUNC_I2C and no I2C_FUNC_SMBUS_I2C_BLOCK:\n+\t * For 16-bit addressed EEPROMs (AT24_FLAG_ADDR16), bypass regmap\n+\t * and use SMBus BYTE_DATA/WORD_DATA helpers.\n+\t *\n+\t * 2. No I2C_FUNC_I2C but I2C_FUNC_SMBUS_READ_I2C_BLOCK advertised\n+\t * (PIIX4 mux children): regmap picks the block-read path which\n+\t * fails at runtime. For 8-bit addressed EEPROMs use BYTE_DATA.\n+\t */\n \tcdata = i2c_get_match_data(client);\n \tif (!cdata)\n \t\treturn -ENODEV;\n@@ -648,6 +813,33 @@\n \t\t}\n \t}\n \n+\t/*\n+\t * Detect SMBus-only adapters (e.g. AMD PIIX4) that lack true I2C\n+\t * capability. Detection is done here, after flags has been resolved\n+\t * from cdata and any device-tree overrides.\n+\t */\n+\tsmbus_addr16_fallback = false;\n+\tsmbus_addr8_fallback = false;\n+\tif (!i2c_fn_i2c) {\n+\t\tbool has_byte = i2c_check_functionality(client->adapter,\n+\t\t\t\t\t\tI2C_FUNC_SMBUS_BYTE_DATA);\n+\t\tbool has_word = i2c_check_functionality(client->adapter,\n+\t\t\t\t\t\tI2C_FUNC_SMBUS_WORD_DATA);\n+\t\tif (has_byte && has_word) {\n+\t\t\t/*\n+\t\t\t * SMBus-only adapter (e.g. AMD PIIX4): no true I2C transfers.\n+\t\t\t * Choose fallback based on EEPROM address width.\n+\t\t\t */\n+\t\t\tif (flags & AT24_FLAG_ADDR16) {\n+\t\t\t\tsmbus_addr16_fallback = true;\n+\t\t\t\tdev_dbg(dev, \"SMBus-only adapter: enabling 16-bit addr SMBus fallback\\n\");\n+\t\t\t} else {\n+\t\t\t\tsmbus_addr8_fallback = true;\n+\t\t\t\tdev_dbg(dev, \"SMBus-only adapter: enabling 8-bit addr SMBus fallback\\n\");\n+\t\t\t}\n+\t\t}\n+\t}\n+\n \terr = device_property_read_u32(dev, \"size\", &byte_len);\n \tif (err)\n \t\tbyte_len = cdata->byte_len;\n@@ -681,10 +873,31 @@\n \tregmap_config.val_bits = 8;\n \tregmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;\n \tregmap_config.disable_locking = true;\n+\t/*\n+\t * Force reg_bits=8 when the SMBus fallback path is active so that\n+\t * regmap_get_i2c_bus() can pick regmap_smbus_byte and succeed on PIIX4.\n+\t * The actual 16-bit address I/O is done entirely by our helpers.\n+\t */\n+\tif (smbus_addr16_fallback && (flags & AT24_FLAG_ADDR16))\n+\t\tregmap_config.reg_bits = 8;\n \n \tregmap = devm_regmap_init_i2c(client, ®map_config);\n-\tif (IS_ERR(regmap))\n-\t\treturn PTR_ERR(regmap);\n+\tif (IS_ERR(regmap)) {\n+\t\t/*\n+\t\t * For SMBus fallback paths the regmap is never used for I/O.\n+\t\t * If regmap init fails (e.g. adapter lacks I2C_FUNC_SMBUS_I2C_BLOCK\n+\t\t * at probe time), retry with a minimal byte config so probe succeeds.\n+\t\t */\n+\t\tif (smbus_addr16_fallback || smbus_addr8_fallback) {\n+\t\t\tstruct regmap_config smbus_config = regmap_config;\n+\n+\t\t\tsmbus_config.reg_bits = 8;\n+\t\t\tsmbus_config.val_bits = 8;\n+\t\t\tregmap = devm_regmap_init_i2c(client, &smbus_config);\n+\t\t}\n+\t\tif (IS_ERR(regmap))\n+\t\t\treturn PTR_ERR(regmap);\n+\t}\n \n \tat24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),\n \t\t\t GFP_KERNEL);\n@@ -700,6 +913,9 @@\n \tat24->num_addresses = num_addresses;\n \tat24->offset_adj = at24_get_offset_adj(flags, byte_len);\n \tat24->client_regmaps[0] = regmap;\n+\tat24->smbus_addr16_fallback = smbus_addr16_fallback;\n+\tat24->smbus_addr8_fallback = smbus_addr8_fallback;\n+\tat24->smbus_client = client;\n \n \tat24->vcc_reg = devm_regulator_get(dev, \"vcc\");\n \tif (IS_ERR(at24->vcc_reg))\n","prefixes":[]}