{"id":2219709,"url":"http://patchwork.ozlabs.org/api/1.1/patches/2219709/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260403222750.1215002-1-dmatlack@google.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260403222750.1215002-1-dmatlack@google.com>","date":"2026-04-03T22:27:50","name":"[v3] PCI: Ensure ATS disabled via quirk before notifying IOMMU drivers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ebc12e9a07b6c0c83ab65c45b1436e340d5ce99e","submitter":{"id":69449,"url":"http://patchwork.ozlabs.org/api/1.1/people/69449/?format=json","name":"David Matlack","email":"dmatlack@google.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260403222750.1215002-1-dmatlack@google.com/mbox/","series":[{"id":498681,"url":"http://patchwork.ozlabs.org/api/1.1/series/498681/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=498681","date":"2026-04-03T22:27:50","name":"[v3] PCI: Ensure ATS disabled via quirk before notifying IOMMU drivers","version":3,"mbox":"http://patchwork.ozlabs.org/series/498681/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/2219709/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219709/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=google.com header.i=@google.com header.a=rsa-sha256\n header.s=20251104 header.b=cY3zyD7N;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; 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charset=\"UTF-8\""},"content":"Ensure that PCI devices always have ATS disable via quirk before IOMMU\ndrivers are notified about the device. Fix this by converting the\nexisting quirks from final to header fixups and changing the quirk logic\nto set a new no_ats bit in struct pci_dev that prevents pci_dev.ats_cap\nfrom ever getting set.\n\nUse header fixups instead of early fixups since not enough of struct\npci_dev is set up in during early fixups: quirk_amd_harvest_no_ats()\nneeds subsystem_device and subsystem_vendor to be set.\n\nThis change ensures that pci_ats_supported() always takes quirks into\naccount during iommu_ops.probe_device(), when IOMMU drivers are notified\nabout devices, and that pci_ats_supported() returns the same value when\nthe device is released in iommu_ops.release_device().\n\nNotably, the Intel IOMMU driver uses pci_ats_supported() in\nprobe/release to determine whether to add/remove a device from a data\nstructure, which easily leads to a use-after-free without this fix.\n\nThis change also makes disabling ATS via quirk behave the same way as\nthe pci=noats command line option, in that pci_ats_init() bails\nimmediately and never initializes pci_dev.ats_cap.\n\nNote: In practice this fix only matters for PCI devices created after\nIOMMU bus notifiers are set up (e.g. hot-plugged devices and VFs).\n\nFixes: a18615b1cfc0 (\"PCI: Disable ATS for specific Intel IPU E2000 devices\")\nCloses: https://lore.kernel.org/linux-iommu/aYUQ_HkDJU9kjsUl@google.com/\nSigned-off-by: David Matlack \n---\nv3:\n - Clarify in commit message that only devices added after boot are\n affected (Baolu)\n - Use header fixups instead of early to avoid breaking\n quirk_amd_harvest_no_ats() (Sashiko)\n - Use u8 instead of unsigned int for no_ats to avoid affecting the\n offsets of existing fields in struct pci_dev (me)\n\nv2: https://lore.kernel.org/linux-pci/20260327211649.3816010-1-dmatlack@google.com/\n\nv1: https://lore.kernel.org/linux-pci/20260223184017.688212-1-dmatlack@google.com/\n\nCc: Raghavendra Rao Ananta \nCc: David Woodhouse \nCc: Lu Baolu \nCc: Andy Shevchenko \n\n drivers/pci/ats.c | 2 +-\n drivers/pci/quirks.c | 50 ++++++++++++++++++++++----------------------\n include/linux/pci.h | 1 +\n 3 files changed, 27 insertions(+), 26 deletions(-)\n\n\nbase-commit: 7df48e36313029e4c0907b2023905dd7213fd678","diff":"diff --git a/drivers/pci/ats.c b/drivers/pci/ats.c\nindex ec6c8dbdc5e9..ceb6f5d3cb10 100644\n--- a/drivers/pci/ats.c\n+++ b/drivers/pci/ats.c\n@@ -21,7 +21,7 @@ void pci_ats_init(struct pci_dev *dev)\n {\n \tint pos;\n \n-\tif (pci_ats_disabled())\n+\tif (pci_ats_disabled() || dev->no_ats)\n \t\treturn;\n \n \tpos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS);\ndiff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c\nindex 48946cca4be7..da010d15b239 100644\n--- a/drivers/pci/quirks.c\n+++ b/drivers/pci/quirks.c\n@@ -5653,7 +5653,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0422, quirk_no_ext_tags);\n static void quirk_no_ats(struct pci_dev *pdev)\n {\n \tpci_info(pdev, \"disabling ATS\\n\");\n-\tpdev->ats_cap = 0;\n+\tpdev->no_ats = 1;\n }\n \n /*\n@@ -5676,25 +5676,25 @@ static void quirk_amd_harvest_no_ats(struct pci_dev *pdev)\n }\n \n /* AMD Stoney platform GPU */\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x98e4, quirk_amd_harvest_no_ats);\n /* AMD Iceland dGPU */\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x6900, quirk_amd_harvest_no_ats);\n /* AMD Navi10 dGPU */\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7310, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7312, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7318, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7319, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x731a, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x731b, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x731e, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x731f, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x7310, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x7312, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x7318, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x7319, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x731a, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x731b, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x731e, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x731f, quirk_amd_harvest_no_ats);\n /* AMD Navi14 dGPU */\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7340, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7341, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7347, quirk_amd_harvest_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x734f, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x7340, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x7341, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x7347, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x734f, quirk_amd_harvest_no_ats);\n /* AMD Raven platform iGPU */\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x15d8, quirk_amd_harvest_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, 0x15d8, quirk_amd_harvest_no_ats);\n \n /*\n * Intel IPU E2000 revisions before C0 implement incorrect endianness\n@@ -5705,15 +5705,15 @@ static void quirk_intel_e2000_no_ats(struct pci_dev *pdev)\n \tif (pdev->revision < 0x20)\n \t\tquirk_no_ats(pdev);\n }\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1451, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1452, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1453, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1454, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1455, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1457, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x1459, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x145a, quirk_intel_e2000_no_ats);\n-DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x145c, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1451, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1452, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1453, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1454, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1455, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1457, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x1459, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x145a, quirk_intel_e2000_no_ats);\n+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x145c, quirk_intel_e2000_no_ats);\n #endif /* CONFIG_PCI_ATS */\n \n /* Freescale PCIe doesn't support MSI in RC mode */\ndiff --git a/include/linux/pci.h b/include/linux/pci.h\nindex 1c270f1d5123..f9729ee71a96 100644\n--- a/include/linux/pci.h\n+++ b/include/linux/pci.h\n@@ -539,6 +539,7 @@ struct pci_dev {\n \t};\n \tu16\t\tats_cap;\t/* ATS Capability offset */\n \tu8\t\tats_stu;\t/* ATS Smallest Translation Unit */\n+\tu8\t\tno_ats:1;\t/* ATS disabled via quirk */\n #endif\n #ifdef CONFIG_PCI_PRI\n \tu16\t\tpri_cap;\t/* PRI Capability offset */\n","prefixes":["v3"]}