{"id":188,"url":"http://patchwork.ozlabs.org/api/1.1/patches/188/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1220627327-28852-1-git-send-email-jacmet@sunsite.dk/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/1.1/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/"},"msgid":"<1220627327-28852-1-git-send-email-jacmet@sunsite.dk>","date":"2008-09-05T15:08:47","name":"powerpc: gpio driver for mpc831x/834x/837x with OF bindings","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":true,"hash":"1c396daf713c4de435939bf2522e6cc6e8c1d474","submitter":{"id":103,"url":"http://patchwork.ozlabs.org/api/1.1/people/103/?format=json","name":"Peter Korsgaard","email":"jacmet@sunsite.dk"},"delegate":{"id":9,"url":"http://patchwork.ozlabs.org/api/1.1/users/9/?format=json","username":"galak","first_name":"Kumar","last_name":"Gala","email":"galak@kernel.crashing.org"},"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1220627327-28852-1-git-send-email-jacmet@sunsite.dk/mbox/","series":[],"comments":"http://patchwork.ozlabs.org/api/patches/188/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/188/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["patchwork@ozlabs.org","linuxppc-dev@ozlabs.org"],"Delivered-To":["patchwork@ozlabs.org","linuxppc-dev@ozlabs.org"],"Received":["from ozlabs.org (localhost [127.0.0.1])\n\tby ozlabs.org (Postfix) with ESMTP id CF520DE1CF\n\tfor ; Sat, 6 Sep 2008 01:09:11 +1000 (EST)","from fg-out-1718.google.com (fg-out-1718.google.com\n\t[72.14.220.156]) by ozlabs.org (Postfix) with ESMTP id 99326DDF6F\n\tfor ; Sat, 6 Sep 2008 01:08:53 +1000 (EST)","by fg-out-1718.google.com with SMTP id d23so788383fga.39\n\tfor ; Fri, 05 Sep 2008 08:08:50 -0700 (PDT)","by 10.86.94.11 with SMTP id r11mr8879564fgb.0.1220627329315;\n\tFri, 05 Sep 2008 08:08:49 -0700 (PDT)","from macbook.be.48ers.dk ( [194.78.207.191])\n\tby mx.google.com with ESMTPS id l12sm1234617fgb.6.2008.09.05.08.08.47\n\t(version=TLSv1/SSLv3 cipher=RC4-MD5);\n\tFri, 05 Sep 2008 08:08:48 -0700 (PDT)","by macbook.be.48ers.dk (Postfix, from userid 1000)\n\tid CB2FC98C5B3; Fri, 5 Sep 2008 17:08:47 +0200 (CEST)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; \n\th=domainkey-signature:received:received:received:from:to:cc:subject\n\t:date:message-id:x-mailer:sender;\n\tbh=wNBpvDoLEkPV2iCPSWSE0tgb4hCAeYe2q7cO20Wf4tA=;\n\tb=PP91iaBZSRD9zSRxvctjznzUaaKc+XvgLuJPgrKiqND29DJ6vX62Hj5FN99f2xMKlH\n\tC7L6MTmzBDvyckyF3A5PE4oWWmUde+CP/FFhEIB8nmzjsVvx9w856zxtcApSEBZkpycy\n\tKt1YnW20zdeK+RxpFhvD6R3ZQMLpySXpjtWM0=","DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gmail.com; s=gamma;\n\th=from:to:cc:subject:date:message-id:x-mailer:sender;\n\tb=WrPtmfswa1BvcvWdEqCCUsBfihtbr5I4P3DUT0vHBtO5qqk9oPDV2/T9MzgDD8FlPV\n\tye8kjAAdmHUynr1Nmk0k6Ow6LdiZmIsBi+v9kuhWxr3z9UKOv+t8tDAK64JxMIKABp0N\n\tSVqjOOZbmdCQany/WfrS7mvssJ5+N6SBARmBs=","From":"Peter Korsgaard ","To":"linuxppc-dev@ozlabs.org, galak@kernel.crashing.org,\n\tavorontsov@ru.mvista.com","Subject":"[PATCH] powerpc: gpio driver for mpc831x/834x/837x with OF bindings","Date":"Fri, 5 Sep 2008 17:08:47 +0200","Message-Id":"<1220627327-28852-1-git-send-email-jacmet@sunsite.dk>","X-Mailer":"git-send-email 1.5.6.3","X-BeenThere":"linuxppc-dev@ozlabs.org","X-Mailman-Version":"2.1.11","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org","Errors-To":"linuxppc-dev-bounces+patchwork=ozlabs.org@ozlabs.org"},"content":"Structured similar to the existing QE GPIO support.\n\nSigned-off-by: Peter Korsgaard ","diff":"diff --git a/Documentation/powerpc/dts-bindings/fsl/83xx_gpio.txt b/Documentation/powerpc/dts-bindings/fsl/83xx_gpio.txt\nnew file mode 100644\nindex 0000000..f43f048\n--- /dev/null\n+++ b/Documentation/powerpc/dts-bindings/fsl/83xx_gpio.txt\n@@ -0,0 +1,33 @@\n+GPIO controllers on MPC831x/834x/837x SoCs\n+\n+Every GPIO controller node must have #gpio-cells property defined,\n+this information will be used to translate gpio-specifiers.\n+\n+Required properties:\n+- compatible : \"fsl,mpc8349-gpio\"\n+- #gpio-cells : Should be two. The first cell is the pin number and the\n+ second cell is used to specify optional parameters (currently unused).\n+ - interrupts : Interrupt mapping for GPIO IRQ (currently unused).\n+ - interrupt-parent : Phandle for the interrupt controller that\n+ services interrupts for this device.\n+- gpio-controller : Marks the port as GPIO controller.\n+\n+Example of gpio-controller nodes for a MPC8349 SoC:\n+\n+\tgpio1: gpio-controller@c00 {\n+\t\t#gpio-cells = <2>;\n+\t\tcompatible = \"fsl,mpc8349-gpio\";\n+\t\treg = <0xc00 0x100>;\n+\t\tinterrupts = <74 0x8>;\n+\t\tinterrupt-parent = <&ipic>;\n+\t\tgpio-controller;\n+\t};\n+\n+\tgpio2: gpio-controller@d00 {\n+\t\t#gpio-cells = <2>;\n+\t\tcompatible = \"fsl,mpc8349-gpio\";\n+\t\treg = <0xd00 0x100>;\n+\t\tinterrupts = <75 0x8>;\n+\t\tinterrupt-parent = <&ipic>;\n+\t\tgpio-controller;\n+\t};\ndiff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig\nindex 72fb35b..d28c3c5 100644\n--- a/arch/powerpc/sysdev/Kconfig\n+++ b/arch/powerpc/sysdev/Kconfig\n@@ -6,3 +6,12 @@ config PPC4xx_PCI_EXPRESS\n \tbool\n \tdepends on PCI && 4xx\n \tdefault n\n+\n+config MPC83xx_GPIO\n+\tbool \"MPC83xx GPIO support\"\n+\tdepends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x\n+\tselect GENERIC_GPIO\n+\tselect ARCH_REQUIRE_GPIOLIB\n+\thelp\n+\t Say Y here if you're going to use hardware that connects to the\n+\t MPC831x/834x/837x GPIOs.\ndiff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile\nindex a90054b..ced5793 100644\n--- a/arch/powerpc/sysdev/Makefile\n+++ b/arch/powerpc/sysdev/Makefile\n@@ -15,6 +15,7 @@ obj-$(CONFIG_FSL_SOC)\t\t+= fsl_soc.o\n obj-$(CONFIG_FSL_PCI)\t\t+= fsl_pci.o $(fsl-msi-obj-y)\n obj-$(CONFIG_FSL_LBC)\t\t+= fsl_lbc.o\n obj-$(CONFIG_FSL_GTM)\t\t+= fsl_gtm.o\n+obj-$(CONFIG_MPC83xx_GPIO)\t+= mpc83xx_gpio.o\n obj-$(CONFIG_RAPIDIO)\t\t+= fsl_rio.o\n obj-$(CONFIG_TSI108_BRIDGE)\t+= tsi108_pci.o tsi108_dev.o\n obj-$(CONFIG_QUICC_ENGINE)\t+= qe_lib/\ndiff --git a/arch/powerpc/sysdev/mpc83xx_gpio.c b/arch/powerpc/sysdev/mpc83xx_gpio.c\nnew file mode 100644\nindex 0000000..a8a132d\n--- /dev/null\n+++ b/arch/powerpc/sysdev/mpc83xx_gpio.c\n@@ -0,0 +1,141 @@\n+/*\n+ * GPIOs on MPC831x/834x/837x\n+ *\n+ * Copyright (C) 2008 Peter Korsgaard \n+ *\n+ * This file is licensed under the terms of the GNU General Public License\n+ * version 2. This program is licensed \"as is\" without any warranty of any\n+ * kind, whether express or implied.\n+ */\n+\n+#include \n+#include \n+#include \n+#include \n+#include \n+#include \n+#include \n+\n+#define GPIO_DIR\t0x00\n+#define GPIO_ODR\t0x04\n+#define GPIO_DAT\t0x08\n+#define GPIO_IER\t0x0c\n+#define GPIO_IMR\t0x10\n+#define GPIO_ICR\t0x14\n+\n+struct mpc83xx_gpio_chip {\n+\tstruct of_mm_gpio_chip mm_gc;\n+\tspinlock_t lock;\n+};\n+\n+static inline struct mpc83xx_gpio_chip *\n+to_mpc83xx_gpio_chip(struct of_mm_gpio_chip *mm)\n+{\n+\treturn container_of(mm, struct mpc83xx_gpio_chip, mm_gc);\n+}\n+\n+static int mpc83xx_gpio_get(struct gpio_chip *gc, unsigned int gpio)\n+{\n+\tstruct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);\n+\tu32 bit = 1u << (31-gpio);\n+\n+\treturn !!(in_be32(mm->regs + GPIO_DAT) & bit);\n+}\n+\n+static void mpc83xx_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)\n+{\n+\tstruct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);\n+\tstruct mpc83xx_gpio_chip *mpc83xx_gc = to_mpc83xx_gpio_chip(mm);\n+\tunsigned long flags;\n+\tu32 data, bit = 1u << (31-gpio);\n+\n+\tspin_lock_irqsave(&mpc83xx_gc->lock, flags);\n+\n+\tdata = in_be32(mm->regs + GPIO_DAT);\n+\tif (val)\n+\t\tdata |= bit;\n+\telse\n+\t\tdata &= ~bit;\n+\tout_be32(mm->regs + GPIO_DAT, data);\n+\n+\tspin_unlock_irqrestore(&mpc83xx_gc->lock, flags);\n+}\n+\n+static int mpc83xx_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)\n+{\n+\tstruct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);\n+\tstruct mpc83xx_gpio_chip *mpc83xx_gc = to_mpc83xx_gpio_chip(mm);\n+\tunsigned long flags;\n+\tu32 bit = 1u << (31-gpio);\n+\n+\tspin_lock_irqsave(&mpc83xx_gc->lock, flags);\n+\n+\tout_be32(mm->regs + GPIO_DIR,\n+\t\t in_be32(mm->regs + GPIO_DIR) & ~bit);\n+\n+\tspin_unlock_irqrestore(&mpc83xx_gc->lock, flags);\n+\n+\treturn 0;\n+}\n+\n+static int mpc83xx_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)\n+{\n+\tstruct of_mm_gpio_chip *mm = to_of_mm_gpio_chip(gc);\n+\tstruct mpc83xx_gpio_chip *mpc83xx_gc = to_mpc83xx_gpio_chip(mm);\n+\tunsigned long flags;\n+\tu32 bit = 1u << (31-gpio);\n+\n+\tmpc83xx_gpio_set(gc, gpio, val);\n+\n+\tspin_lock_irqsave(&mpc83xx_gc->lock, flags);\n+\tout_be32(mm->regs + GPIO_DIR,\n+\t\t in_be32(mm->regs + GPIO_DIR) | bit);\n+\n+\tspin_unlock_irqrestore(&mpc83xx_gc->lock, flags);\n+\n+\treturn 0;\n+}\n+\n+static int __init mpc83xx_add_gpiochips(void)\n+{\n+\tstruct device_node *np;\n+\n+\tfor_each_compatible_node(np, NULL, \"fsl,mpc8349-gpio\") {\n+\t\tint ret;\n+\t\tstruct mpc83xx_gpio_chip *mpc83xx_gc;\n+\t\tstruct of_mm_gpio_chip *mm_gc;\n+\t\tstruct of_gpio_chip *of_gc;\n+\t\tstruct gpio_chip *gc;\n+\n+\t\tmpc83xx_gc = kzalloc(sizeof(*mpc83xx_gc), GFP_KERNEL);\n+\t\tif (!mpc83xx_gc) {\n+\t\t\tret = -ENOMEM;\n+\t\t\tgoto err;\n+\t\t}\n+\n+\t\tspin_lock_init(&mpc83xx_gc->lock);\n+\n+\t\tmm_gc = &mpc83xx_gc->mm_gc;\n+\t\tof_gc = &mm_gc->of_gc;\n+\t\tgc = &of_gc->gc;\n+\n+\t\tof_gc->gpio_cells = 2;\n+\t\tgc->ngpio = 32;\n+\t\tgc->direction_input = mpc83xx_gpio_dir_in;\n+\t\tgc->direction_output = mpc83xx_gpio_dir_out;\n+\t\tgc->get = mpc83xx_gpio_get;\n+\t\tgc->set = mpc83xx_gpio_set;\n+\n+\t\tret = of_mm_gpiochip_add(np, mm_gc);\n+\t\tif (ret)\n+\t\t\tgoto err;\n+\t\tcontinue;\n+err:\n+\t\tpr_err(\"%s: registration failed with status %d\\n\",\n+\t\t np->full_name, ret);\n+\t\tkfree(mpc83xx_gc);\n+\t\t/* try others anyway */\n+\t}\n+\treturn 0;\n+}\n+arch_initcall(mpc83xx_add_gpiochips);\n","prefixes":[]}