{"id":2231949,"url":"http://patchwork.ozlabs.org/api/1.1/covers/2231949/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260501161010.71688-1-18255117159@163.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260501161010.71688-1-18255117159@163.com>","date":"2026-05-01T16:10:06","name":"[0/4] PCI: dwc: designware-plat: Use common mode field in struct dw_pcie","submitter":{"id":89937,"url":"http://patchwork.ozlabs.org/api/1.1/people/89937/?format=json","name":"Hans Zhang","email":"18255117159@163.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260501161010.71688-1-18255117159@163.com/mbox/","series":[{"id":502479,"url":"http://patchwork.ozlabs.org/api/1.1/series/502479/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=502479","date":"2026-05-01T16:10:06","name":"PCI: dwc: designware-plat: Use common mode field in struct dw_pcie","version":1,"mbox":"http://patchwork.ozlabs.org/series/502479/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2231949/comments/","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=163.com header.i=@163.com header.a=rsa-sha256\n header.s=s110527 header.b=S6zP4gvJ;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.234.253.10; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-53584-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=\"S6zP4gvJ\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=117.135.210.4","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=163.com"],"Received":["from sea.lore.kernel.org (sea.lore.kernel.org [172.234.253.10])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g6bcj4ytxz1xqf\n\tfor ; Sat, 02 May 2026 02:11:01 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 29F213003E8D\n\tfor ; Fri, 1 May 2026 16:10:59 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id DE1953F0749;\n\tFri, 1 May 2026 16:10:57 +0000 (UTC)","from m16.mail.163.com (m16.mail.163.com [117.135.210.4])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 565943E0253;\n\tFri, 1 May 2026 16:10:48 +0000 (UTC)","from zhb.. (unknown [])\n\tby gzga-smtp-mtada-g1-4 (Coremail) with SMTP id\n _____wDnj5Fk0PRprTQgCw--.53438S2;\n\tSat, 02 May 2026 00:10:14 +0800 (CST)"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1777651856; cv=none;\n b=pwUoSD79yCTnT1QthrFFe1DMUWjlwmSeGMyVZ4DiAbfpiaw23o/JyXyHzbMEW5QzwPQ8SKrgFcDnoLrkfyo0YVn81meqMKQ+xg3PHJuZuzlQzh18lHi0ZK8DbcjPXlgfWwTOKdveMrv3Y5O9BIn9tYbii9rFlFmXH1h4FEOC3oY=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1777651856; c=relaxed/simple;\n\tbh=aXhC65Zb6lsdMfo0s9aGwilLcrNlX4abA5vMXDMW8Ys=;\n\th=From:To:Cc:Subject:Date:Message-Id:MIME-Version;\n b=OM3LVJEAuu0lI6Ws09RAF03E3B3UJYmfr+3JV0Ii4h/ydDAKuDwq1VRtrNVbMAbxmEUIPtz4zvRqKKn/P/ftcpJDVfAbrZYnB/S48+v8k+hYFbaY13agNDRO2XkCVXt2Uh2j9McUtdJyVVluqD/vtQKRXkjRcTjaHGF8Kq7EJCo=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=163.com;\n spf=pass smtp.mailfrom=163.com;\n dkim=pass (1024-bit key) header.d=163.com header.i=@163.com\n header.b=S6zP4gvJ; arc=none smtp.client-ip=117.135.210.4","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com;\n\ts=s110527; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=ad\n\tRwuuCrFZ1DP5Y6ptJ3l0RWG3ARD5LzNtr8Y+beLwo=; b=S6zP4gvJkCaDC9/0y4\n\t25Y+ATtec/1MfzjfZzE8fAtkUyRaYJoRt1cjztX+1dYBdxGlU8zKd3QnuAWDiF3I\n\tNDLHWdWYKqQ15MXCgyGSf901Zlq9bbvZk1PIhbI8dBe3zenJHPHuSQmLAKKA3fmd\n\toOhZgBAVfBMxwp45L90639III=","From":"Hans Zhang <18255117159@163.com>","To":"lpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tbhelgaas@google.com,\n\tjingoohan1@gmail.com,\n\tmani@kernel.org,\n\tvigneshr@ti.com","Cc":"xrobh@kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tHans Zhang <18255117159@163.com>","Subject":"[PATCH 0/4] PCI: dwc: designware-plat: Use common mode field in\n struct dw_pcie","Date":"Sat, 2 May 2026 00:10:06 +0800","Message-Id":"<20260501161010.71688-1-18255117159@163.com>","X-Mailer":"git-send-email 2.34.1","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-CM-TRANSID":"_____wDnj5Fk0PRprTQgCw--.53438S2","X-Coremail-Antispam":"1Uf129KBjvJXoW7tw4fZFWfGr48Kw47uFyfWFg_yoW8Gr1UpF\n\tZ3Wa4Y9r4rCF98uF1xuF4v9ryay3Z5AFyUGrZxK34IqF9rur9rC3W0yrWrtrW3KF4Iqr1q\n\tkr1Yq345CF1UAFUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2\n\t9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0piJGYdUUUUU=","X-CM-SenderInfo":"rpryjkyvrrlimvzbiqqrwthudrp/xtbCwwbkiGn00GaC1AAA3U"},"content":"Several DesignWare PCIe controller drivers (dra7xx, artpec6,\ndesignware-plat, and keembay) duplicated the device mode field\nin their private structures, while struct dw_pcie already contains\nthis field. This led to:\n1. Data redundancy and potential inconsistencies\n2. Increased maintenance complexity\n3. Error-prone device type checks\n\nThis series fixes these issues by:\n- Removing redundant mode fields from all four drivers\n- Standardizing on dw_pcie->mode for device type detection\n- Simplifying conditional logic in probe/suspend/resume paths\n- Ensuring consistent error reporting\n\nThe changes improve code maintainability and eliminate class of bugs\nrelated to mode synchronization.\n\nHans Zhang (4):\n PCI: dra7xx: Use common mode field in struct dw_pcie\n PCI: artpec6: Use common mode field in struct dw_pcie\n PCI: dwc: Use common mode field in struct dw_pcie\n PCI: keembay: Use common mode field in struct dw_pcie\n\n drivers/pci/controller/dwc/pci-dra7xx.c | 11 +++++------\n drivers/pci/controller/dwc/pcie-artpec6.c | 9 ++++-----\n drivers/pci/controller/dwc/pcie-designware-plat.c | 7 +++----\n drivers/pci/controller/dwc/pcie-keembay.c | 9 ++++-----\n 4 files changed, 16 insertions(+), 20 deletions(-)\n\n\nbase-commit: e75a43c7cec459a07d91ed17de4de13ede2b7758"}