{"id":2229447,"url":"http://patchwork.ozlabs.org/api/1.1/covers/2229447/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260428-t_power_on_fux-v5-0-f1ef926a91ff@oss.qualcomm.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260428-t_power_on_fux-v5-0-f1ef926a91ff@oss.qualcomm.com>","date":"2026-04-28T08:37:14","name":"[v5,0/3] PCI: qcom: Program T_POWER_ON value for L1.2 exit timing","submitter":{"id":89908,"url":"http://patchwork.ozlabs.org/api/1.1/people/89908/?format=json","name":"Krishna Chaitanya Chundru","email":"krishna.chundru@oss.qualcomm.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260428-t_power_on_fux-v5-0-f1ef926a91ff@oss.qualcomm.com/mbox/","series":[{"id":501799,"url":"http://patchwork.ozlabs.org/api/1.1/series/501799/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=501799","date":"2026-04-28T08:37:15","name":"PCI: qcom: Program T_POWER_ON value for L1.2 exit timing","version":5,"mbox":"http://patchwork.ozlabs.org/series/501799/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2229447/comments/","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=J4E2VkR4;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=ieaSO7Pi;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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This value is used by\nthe ASPM driver to compute the LTR_L1.2_THRESHOLD.\n\nCurrently, qcom root port exposes T_POWER_ON value of zero in the L1SS\ncapability registers, leading to incorrect LTR_L1.2_THRESHOLD calculations,\nwhich can result in improper L1.2 exit behavior and can trigger AER's.\n\nIn this series, qcom controller drivers read the devicetree property\n\"t-power-on\" which got merged recently[1], and use that value to over\nwrite default/wrong value.\n\nTo convert T_POWER_ON in to T_POWER_ON_SCALE & T_POWER_ON_VALUE created\na pcie_encode_t_power_on() helper in aspm.c and also created\ndw_pcie_program_t_power_on() helper for other drivers to use these\nhelpers.\n\nLink [1]: https://lore.kernel.org/all/20260205093346.667898-1-krishna.chundru@oss.qualcomm.com/\n\nSigned-off-by: Krishna Chaitanya Chundru \n---\nChanges in v5:\n- Initialize *scale & *value to zero incase of ASPM is disabled pointed\n by sashiko.\n- Use dwc readl & writel API's instead of direct readl & writel pointed\n by sashiko\n- couple of nits (Mani).\n- Link to v4: https://lore.kernel.org/r/20260404-t_power_on_fux-v4-0-2891391177f4@oss.qualcomm.com\n\nChanges in v4:\n- calculate maxv from PCI_L1SS_CTL2_T_PWR_ON_VALUE to PCI_L1SS_CAP_P_PWR_ON_VALUE (Mani).\n- added a todo to move the reading the devicetree from qcom driver to\n dwc once multi root port parsing support is added (Mani).\n- Link to v3: https://lore.kernel.org/r/20260311-t_power_on_fux-v3-0-9b1f1d09c6f3@oss.qualcomm.com\n\nChanges in v3:\n- move pcie_encode_t_power_on() include/linux/pci.h to\n drivers/pci/pci.h (Bjorn).\n- couple of changes in commit text and variable name like t_power_on (Bjorn).\n- remove return 0 from qcom_pcie_configure_ports (Bjorn).\n- used FIELD_MODIFY instead of FIELD_PREP (Bjorn).\n- Link to v2: https://lore.kernel.org/r/20260223-t_power_on_fux-v2-0-20c921262709@oss.qualcomm.com\n\nChanges in v2:\n- Instead of hard coding the values in the driver, created a devicetree\n property \"t-power-on\" to program it (Bjorn & Mani).\n- Link to v1: https://lore.kernel.org/r/20251104-t_power_on_fux-v1-1-eb5916e47fd7@oss.qualcomm.com\n\nTo: Bjorn Helgaas \nTo: Jingoo Han \nTo: Manivannan Sadhasivam \nTo: Lorenzo Pieralisi \nTo: Krzysztof Wilczyński \nTo: Rob Herring \nCc: linux-pci@vger.kernel.org\nCc: linux-kernel@vger.kernel.org\nCc: linux-arm-msm@vger.kernel.org\n\n---\nKrishna Chaitanya Chundru (3):\n PCI/ASPM: Add helper to encode L1SS T_POWER_ON fields\n PCI: dwc: Add helper to Program T_POWER_ON\n PCI: qcom: Program T_POWER_ON\n\n drivers/pci/controller/dwc/pcie-designware.c | 28 +++++++++++++++++++\n drivers/pci/controller/dwc/pcie-designware.h | 1 +\n drivers/pci/controller/dwc/pcie-qcom.c | 14 ++++++++++\n drivers/pci/pci.h | 6 +++++\n drivers/pci/pcie/aspm.c | 40 ++++++++++++++++++++++++++++\n 5 files changed, 89 insertions(+)\n---\nbase-commit: 3b3bea6d4b9c162f9e555905d96b8c1da67ecd5b\nchange-id: 20251104-t_power_on_fux-70dc68377941\n\nBest regards,\n-- \nKrishna Chaitanya Chundru "}