{"id":2229373,"url":"http://patchwork.ozlabs.org/api/1.1/covers/2229373/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260428075030.1626440-1-hongxing.zhu@nxp.com/","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.1/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260428075030.1626440-1-hongxing.zhu@nxp.com>","date":"2026-04-28T07:50:27","name":"[v2,0/3] Add root port reset to support link recovery","submitter":{"id":68324,"url":"http://patchwork.ozlabs.org/api/1.1/people/68324/?format=json","name":"Richard Zhu","email":"hongxing.zhu@nxp.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-pci/cover/20260428075030.1626440-1-hongxing.zhu@nxp.com/mbox/","series":[{"id":501780,"url":"http://patchwork.ozlabs.org/api/1.1/series/501780/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-pci/list/?series=501780","date":"2026-04-28T07:50:29","name":"Add root port reset to support link recovery","version":2,"mbox":"http://patchwork.ozlabs.org/series/501780/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2229373/comments/","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=nxp.com header.i=@nxp.com header.a=rsa-sha256\n header.s=selector1 header.b=UlLr49A1;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) 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b=UlLr49A1IoE4ZU2bCaBgo24YdCnjFMetlNANWYuv6vOOie9UBOyA0Tr3uNC+Ummx7/HTVh4C54GOlxaDSaDo70iBDLq7wKxhB309wTVMJuGrrEDcMER0dDy9PV0DovaDLKkyXE1sG6cEHFCG+KocKvxvDmja8neoKMdLDi1sbR72fkydFqbKjWj6/JTeiXxbrYwRrP8L33d57KSuebyJAAnzL6uonYkhnsH0VaZIPahYqGwaaFfWhWxWSrcWKDJqHhDE7dQdWMPcboRG4oAD/s6HUzZO8jSHB4zLtgwcrmPO6n6p+RAC1sjGVEEkiE6AwbS4452COytr4gPB/NgbLA==","From":"Richard Zhu ","To":"robh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\tbhelgaas@google.com,\n\tfrank.li@nxp.com,\n\tl.stach@pengutronix.de,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\ts.hauer@pengutronix.de,\n\tkernel@pengutronix.de,\n\tfestevam@gmail.com","Cc":"linux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\timx@lists.linux.dev,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH v2 0/3] Add root port reset to support link recovery","Date":"Tue, 28 Apr 2026 15:50:27 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kGZxfR4FDWotBT38W1ahd8PT3r+s6FZ5a+q+nKwc8100UrWN6GySyXOL2pNtH/7DAEtM8D/wmoYbEmf1e97TAs8YuLrdEexymp4QxzIQ91tWHp1fjLOIXfS+g08dnNoECtOMPqUS2TQS/gd43n5RHLNV7dlQJd0lF+vDxZdSr1fXmDWHOEF8klRs+t1pXaPnQ0ua1kv2+LutcNMKDcQy27bVnAQovPQuPgJz/66xWouCGY3MzA5nmGQ5LZh77MOnWxqtRQIu8OMYPexGzhOdPO6gXjfxXKQ/etHDjfdAhbO334jI2HxY3ee8/VS3FONY2R7mlPx5BgkTE/mhUQuoKK9qQhRcHjpQfzf1/7AH8U20jSjX052tQ1sFNwJ1gQRd/NcDeo2nBj6OtNGFJdKf2bazkafHxDVABh47a6Wxpyx7BBoL0NGvScsFXqpG+EZ0zEQiblxTulJpVdBGl9Ipu7lMiSJ22Jctqa/I/9WyhYLNhu7wAUzHChfwOeF3ZUyfbwXqFHa17b2GPNhycjD5BUwmRlkOaiacK73BWtIB9/mAJ5JrUzFNxodwbpDL6f/IWWsBm9VOyfzKQQwxgTKwVCF0bV6jJq8plVl1J/T37ygDvmYsFuFkb15p0ovLx9Clx/2qdPdIABWsilx+jgK5ffbNVW+cG3ynRO2RSxFSw841Nv755YlKm2QhbYnYowTOGrLffjzMAF6ugD/uWwwuQ0jcci1fDbrWB4lWIh2zayr0/Z4pX098L1qQwnwboUjMmk6MZPQ9U+HgTbgG4pKYpGPCEK9e8OUqMwl2xQxaTrB7PlF4HTV7b3a8bkISZ4KP+8LdLOAgLhZ5wfuXqPuLILS24TALiiaEjbZqH4XN5Q+K1fbsIWBPseWcObL9fAdO1+A+Jf6BS9oGF+gavslw8G7drx/ODWCqMTEfdqGbhtcJFwuvdQPMNuzfBlrLCC6/23NDpGjSfn5j/fJixWNbU1y5cKb249XHN6+o5zN+zSrEAi8CtQvEtUmxMEBlFgWwnwsTXw49DfCn/KDWcwbbfEu8Q9z0p0GnbpqwV4ob2BsxVWVxBybzOFEm7hkCSbD5qMJqzauyCV+02SClR83aXLdQCa4zUDANJxDub2IxOASpLwKgVtCcN7dxCIRHk/sUcKw7Nk23Op/3zitQ8mtkRCbloEuGY8PbmlsnOOolyRTf3ePSR5y1f3p2CekURZA4RvLACyEqeQlgPg83KK/uGuysqLn5AS7PewmzfgIz1Zz02ZIfk/lmIn7QSonPpzRhQP2qjTFov8JI5T1jIOy7lWmvrmRZadp/VJWUCVe/z9GLJqNniKqZWYJR9uSxjbQ45UCKNTooB5qOvQdD1rMiDn5aQ+3kxGRIw4tyL0sfhXTKFoJyGA5Aw59h1botZ/oJ/rwGxkfDBuqypil8Cm+IfGysrDL4SnVnqHaw9RPsB+z3ylH0Pl5Kpv/mn/i2fN6HFabYgvc4CEOG/fQiYv1WrTF1dbfRcUAR/fWX6uHttAtxXuJpoNuOvzaepz5DSQZpwkgtytow59B59Yc5iDB9pyR7T3U2mbzFP9wPBeJKvVqgAlnPAo/9BNEXVAg1MvzU+HhijSVqC30YFp/+D6c6b+ouHxSeRQgNwaYRx/O1IcuPw5b79OE5sFugC9vUt0VSxc0JMkOVfzR/ii5QReFzPQVmTALwhQAapQIfvSIq/YcgWekpd0GSJX9DvYD8TKgG6CDPdHF43sfLfPZLseFKiA==","X-OriginatorOrg":"nxp.com","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n b7957cbf-196b-4f45-f3c3-08dea4faa80d","X-MS-Exchange-CrossTenant-AuthSource":"AM0PR04MB5220.eurprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Internal","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"28 Apr 2026 07:49:20.9068\n (UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-CrossTenant-Id":"686ea1d3-bc2b-4c6f-a92c-d99c5c301635","X-MS-Exchange-CrossTenant-MailboxType":"HOSTED","X-MS-Exchange-CrossTenant-UserPrincipalName":"\n v0Zvl+Bz9r7nBAS4IsS5fbpXeyq0YFI/vOCVSmSjpRimmsXts5xdtGaZjD3KuN/b8RunA5cpM6GyYtF0YRd1ZA==","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"VI0PR04MB11024"},"content":"Based on the following patch-set[1] issued by Mani.\nAdd support for resetting the Root Port for i.MX PCIe to enable link recovery.\n\n[1] [v7,0/4] PCI: Add support for resetting the Root Ports in a platform specific way\n\nPCIe links can go down due to various unexpected circumstances. This patch series\nadds root port reset support for link recovery on i.MX PCIe controllers when the\noptional \"intr\" interrupt is present.\n\nWhen a link down event is detected, the root port reset uninitializes and\nreinitializes the PCIe controller, then restarts the PCIe link.\n\nOn i.MX95 platforms, link events and PME share the same interrupt line.\nLink event interrupts cannot use only an IRQ thread handler because the PME\ndriver uses request_irq() to bind the PME interrupt directly with only the\nIRQF_SHARED flag set.\n\nTo address this, we register one handler with IRQF_SHARED for link event\ninterrupts and manipulate the enable bits of link events to ensure the same\ninterrupt source is triggered only once at a time.\n\nAdditionally, this series adds 'intr', 'aer', and 'pme' interrupt entries to\nthe i.MX6Q PCIe binding to support PCIe event-based interrupts for general\ncontroller events, Advanced Error Reporting, and Power Management Events\nrespectively.\n\nChanges in v2:\n- Constrain the new added three interrupt entries to be valid only for the\ni.MX95 variant using conditional schemas\n\n[PATCH v2 1/3] dt-bindings: PCI: imx6q-pcie: Add intr, aer and pme\n[PATCH v2 2/3] arm64: dts: imx95: Add dma, intr, aer and pme\n[PATCH v2 3/3] PCI: imx6: Add root port reset to support link\n\nDocumentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 21 ++++++++++++++++\narch/arm64/boot/dts/freescale/imx95.dtsi | 16 +++++++++---\ndrivers/pci/controller/dwc/pci-imx6.c | 123 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++\n3 files changed, 156 insertions(+), 4 deletions(-)"}